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* Any idea why some 32bits architectures return in register value larger than the register ?
@ 2019-04-02 20:30 William Tambe
  2019-04-02 20:37 ` Jeff Law
  0 siblings, 1 reply; 4+ messages in thread
From: William Tambe @ 2019-04-02 20:30 UTC (permalink / raw)
  To: gcc-help

When looking at backends for moxie and ft32, which are cpus for which
the return register is 32bits, TARGET_ RETURN_IN_MEMORY is implemented
such that the function value is returned in a register even when its
size is 64bits. ie:

https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/ft32/ft32.c#L63

https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L60

Any idea why it is implemented that way ?

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Any idea why some 32bits architectures return in register value larger than the register ?
  2019-04-02 20:30 Any idea why some 32bits architectures return in register value larger than the register ? William Tambe
@ 2019-04-02 20:37 ` Jeff Law
  2019-04-02 20:45   ` William Tambe
  0 siblings, 1 reply; 4+ messages in thread
From: Jeff Law @ 2019-04-02 20:37 UTC (permalink / raw)
  To: William Tambe, gcc-help

On 4/2/19 2:30 PM, William Tambe wrote:
> When looking at backends for moxie and ft32, which are cpus for which
> the return register is 32bits, TARGET_ RETURN_IN_MEMORY is implemented
> such that the function value is returned in a register even when its
> size is 64bits. ie:
> 
> https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/ft32/ft32.c#L63
> 
> https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L60
> 
> Any idea why it is implemented that way ?
> 
Could be that's how the ABI is defined.  It's often the case that ABI's
define double-word objects as being passed and returned in register
pairs for efficiency.

jeff

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Any idea why some 32bits architectures return in register value larger than the register ?
  2019-04-02 20:37 ` Jeff Law
@ 2019-04-02 20:45   ` William Tambe
  2019-04-03 16:34     ` Jeff Law
  0 siblings, 1 reply; 4+ messages in thread
From: William Tambe @ 2019-04-02 20:45 UTC (permalink / raw)
  To: Jeff Law; +Cc: gcc-help

is that still ok even when TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE
and TARGET_FUNCTION_VALUE_REGNO_P are defined for a single register
that can only hold a single-word object ? ie:

https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L75
https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L86
https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L94

On Tue, Apr 2, 2019 at 3:37 PM Jeff Law <law@redhat.com> wrote:
>
> On 4/2/19 2:30 PM, William Tambe wrote:
> > When looking at backends for moxie and ft32, which are cpus for which
> > the return register is 32bits, TARGET_ RETURN_IN_MEMORY is implemented
> > such that the function value is returned in a register even when its
> > size is 64bits. ie:
> >
> > https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/ft32/ft32.c#L63
> >
> > https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L60
> >
> > Any idea why it is implemented that way ?
> >
> Could be that's how the ABI is defined.  It's often the case that ABI's
> define double-word objects as being passed and returned in register
> pairs for efficiency.
>
> jeff

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Any idea why some 32bits architectures return in register value larger than the register ?
  2019-04-02 20:45   ` William Tambe
@ 2019-04-03 16:34     ` Jeff Law
  0 siblings, 0 replies; 4+ messages in thread
From: Jeff Law @ 2019-04-03 16:34 UTC (permalink / raw)
  To: William Tambe; +Cc: gcc-help

On 4/2/19 2:45 PM, William Tambe wrote:
> is that still ok even when TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE
> and TARGET_FUNCTION_VALUE_REGNO_P are defined for a single register
> that can only hold a single-word object ? ie:
> 
> https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L75
> https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L86
> https://github.com/gcc-mirror/gcc/blob/gcc-8_3_0-release/gcc/config/moxie/moxie.c#L94
Note that in the first two examples we generate a REG rtx with the given
mode.  If the given mode is larger than a single word, that's fine.  It
means a register pair (or quad or octa depending on the size of the mode).

So on a typical 32bit target you might have

(reg:SI 0)  for returning 32 bit objects
(reg:DI 0)  for returning 64 bit objects
(reg:TI 0)  for returning 128 bit objects

Jeff

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2019-04-03 16:34 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2019-04-02 20:30 Any idea why some 32bits architectures return in register value larger than the register ? William Tambe
2019-04-02 20:37 ` Jeff Law
2019-04-02 20:45   ` William Tambe
2019-04-03 16:34     ` Jeff Law

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