Re: Inline assembly constraints question

[Jeroen Demeyer <jdemeyer@cage.ugent.be>]

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Ian Lance Taylor wrote:
> Jeroen Demeyer <jdemeyer@cage.ugent.be> writes:
> 
>> I have a C++ program (i386 target) which has a piece of inline
>> assembly with the following constraints:
>>
>> asm(/* Some asm code */
>>     : "=&rm" (n0), "=&r" (n1), "=&r" (n2)
>>     : "2" (n0), "1" (n1), "g" (n2), "cI" (s)
>> );
>>
>> When compiled with g++ 4.1.2 (CXXFLAGS=-O2 -march=pentium4) the
>> operands %0 and %5 get the same memory address, even though they refer
>> to distinct variables (n0 and n2).
> 
> It would help to see the types of the variables.  Is n2 a pointer?
> Also it would help to see the actual values that wind up getting
> passed in.
n0, n1, n2 are unsigned long (members of the same C++ class, the asm 
statement is in a member function), s is unsigned char.

> I think more details would help.  For example, run gcc with the -dg
> option, look at FILENAME.xxx.greg, and show us the insn corresponding
> to the asm statement.
This is the full asm statement:
asm("# number_t& number_t::operator>>=(unsigned char s)\n"
     "   shrdl %6, %4, %3\n"
     "   movl %3, %0\n"
     "   movl %5, %2\n"
     "   shrdl %6, %2, %1\n"
     "   shrl %6, %2\n"
     : "=&rm" (n0), "=&r" (n1), "=&r" (n2)
     : "2" (n0), "1" (n1), "g" (n2), "cI" (s)
);

The code generated is the following:
     shrdl %cl, %esi, %eax
     movl %eax, -4384(%ebp)
     movl -4384(%ebp), %eax
     shrdl %cl, %eax, %esi
     shrl %cl, %eax

As you can see, %0 and %5 both become -4384(%ebp).
See attachment for the output from -dg.

I hope this clarifies the problem.


Thank you!

[-- Attachment #2: test.cpp.37.greg --]
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(insn:HI 809 1339 1338 109 (parallel [
            (set (mem/c:SI (plus:SI (reg/f:SI 6 bp)
                        (const_int -4384 [0xffffeee0])) [88 t$n0.805+0 S4 A8])
                (asm_operands:SI ("# number_t& number_t::operator>>=(unsigned char s)
	shrdl %6, %4, %3
	movl %3, %0
	movl %5, %2
	shrdl %6, %2, %1
	shrl %6, %2
") ("=&rm") 0 [
                        (reg:SI 0 ax)
                        (reg:SI 4 si)
                        (mem/c:SI (plus:SI (reg/f:SI 6 bp)
                                (const_int -4384 [0xffffeee0])) [88 t$n2+0 S4 A8])
                        (reg:QI 2 cx)
                    ]
                     [
                        (asm_input:SI ("2"))
                        (asm_input:SI ("1"))
                        (asm_input:SI ("g"))
                        (asm_input:QI ("cI"))
                    ] ("i386/number96.h") 148))
            (set (reg:SI 4 si)
                (asm_operands:SI ("# number_t& number_t::operator>>=(unsigned char s)
	shrdl %6, %4, %3
	movl %3, %0
	movl %5, %2
	shrdl %6, %2, %1
	shrl %6, %2
") ("=&r") 1 [
                        (reg:SI 0 ax)
                        (reg:SI 4 si)
                        (mem/c:SI (plus:SI (reg/f:SI 6 bp)
                                (const_int -4384 [0xffffeee0])) [88 t$n2+0 S4 A8])
                        (reg:QI 2 cx)
                    ]
                     [
                        (asm_input:SI ("2"))
                        (asm_input:SI ("1"))
                        (asm_input:SI ("g"))
                        (asm_input:QI ("cI"))
                    ] ("i386/number96.h") 148))
            (set (reg:SI 0 ax)
                (asm_operands:SI ("# number_t& number_t::operator>>=(unsigned char s)
	shrdl %6, %4, %3
	movl %3, %0
	movl %5, %2
	shrdl %6, %2, %1
	shrl %6, %2
") ("=&r") 2 [
                        (reg:SI 0 ax)
                        (reg:SI 4 si)
                        (mem/c:SI (plus:SI (reg/f:SI 6 bp)
                                (const_int -4384 [0xffffeee0])) [88 t$n2+0 S4 A8])
                        (reg:QI 2 cx)
                    ]
                     [
                        (asm_input:SI ("2"))
                        (asm_input:SI ("1"))
                        (asm_input:SI ("g"))
                        (asm_input:QI ("cI"))
                    ] ("i386/number96.h") 148))
            (clobber (reg:QI 19 dirflag))
            (clobber (reg:QI 18 fpsr))
            (clobber (reg:QI 17 flags))
        ]) -1 (nil)
    (nil))