* Inline assembly constraints question
@ 2008-08-18 10:34 Jeroen Demeyer
2008-08-19 16:59 ` Ian Lance Taylor
0 siblings, 1 reply; 4+ messages in thread
From: Jeroen Demeyer @ 2008-08-18 10:34 UTC (permalink / raw)
To: gcc-help
Hello,
I have a C++ program (i386 target) which has a piece of inline assembly
with the following constraints:
asm(/* Some asm code */
: "=&rm" (n0), "=&r" (n1), "=&r" (n2)
: "2" (n0), "1" (n1), "g" (n2), "cI" (s)
);
When compiled with g++ 4.1.2 (CXXFLAGS=-O2 -march=pentium4) the operands
%0 and %5 get the same memory address, even though they refer to
distinct variables (n0 and n2). So, is this a bug in g++ 4.1.2 or am I
doing something wrong? g++ 3.4.6 and g++ 4.3.1 generate correct code,
but that does not really prove anything.
In particular I would like to know:
1) Is it allowed to put matching (digit) constraints referring to
different variables? This is what I do with %2. The same register is
used as input for variable n0 and as output for variable n2.
2) Is there a way to specify some kind of 'earlyclobber' (&) modifier
with a memory constraint? How can I prevent gcc from putting an input
variable and an unrelated output variable in the same memory location?
Thank you for your time,
Jeroen Demeyer.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Inline assembly constraints question
2008-08-18 10:34 Inline assembly constraints question Jeroen Demeyer
@ 2008-08-19 16:59 ` Ian Lance Taylor
2008-08-20 13:47 ` Jeroen Demeyer
0 siblings, 1 reply; 4+ messages in thread
From: Ian Lance Taylor @ 2008-08-19 16:59 UTC (permalink / raw)
To: Jeroen Demeyer; +Cc: gcc-help
Jeroen Demeyer <jdemeyer@cage.ugent.be> writes:
> I have a C++ program (i386 target) which has a piece of inline
> assembly with the following constraints:
>
> asm(/* Some asm code */
> : "=&rm" (n0), "=&r" (n1), "=&r" (n2)
> : "2" (n0), "1" (n1), "g" (n2), "cI" (s)
> );
>
> When compiled with g++ 4.1.2 (CXXFLAGS=-O2 -march=pentium4) the
> operands %0 and %5 get the same memory address, even though they refer
> to distinct variables (n0 and n2). So, is this a bug in g++ 4.1.2 or
> am I doing something wrong? g++ 3.4.6 and g++ 4.3.1 generate correct
> code, but that does not really prove anything.
It would help to see the types of the variables. Is n2 a pointer?
Also it would help to see the actual values that wind up getting
passed in.
With "=%rm" you are telling gcc that it is OK to pass a memory
address. And "g" accepts any operand. That gives gcc a lot of
flexibility. If it does wind up passing in a memory operand for both,
though, it seems to me that they should not overlap.
I think more details would help. For example, run gcc with the -dg
option, look at FILENAME.xxx.greg, and show us the insn corresponding
to the asm statement.
> In particular I would like to know:
> 1) Is it allowed to put matching (digit) constraints referring to
> different variables? This is what I do with %2. The same register is
> used as input for variable n0 and as output for variable n2.
Yes, that is fine.
> 2) Is there a way to specify some kind of 'earlyclobber' (&) modifier
> with a memory constraint? How can I prevent gcc from putting an input
> variable and an unrelated output variable in the same memory location?
The simple way is to force one or both of them into registers.
Ian
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Inline assembly constraints question
2008-08-19 16:59 ` Ian Lance Taylor
@ 2008-08-20 13:47 ` Jeroen Demeyer
2008-08-20 19:31 ` Ian Lance Taylor
0 siblings, 1 reply; 4+ messages in thread
From: Jeroen Demeyer @ 2008-08-20 13:47 UTC (permalink / raw)
To: Ian Lance Taylor; +Cc: gcc-help
[-- Attachment #1: Type: text/plain, Size: 1565 bytes --]
Ian Lance Taylor wrote:
> Jeroen Demeyer <jdemeyer@cage.ugent.be> writes:
>
>> I have a C++ program (i386 target) which has a piece of inline
>> assembly with the following constraints:
>>
>> asm(/* Some asm code */
>> : "=&rm" (n0), "=&r" (n1), "=&r" (n2)
>> : "2" (n0), "1" (n1), "g" (n2), "cI" (s)
>> );
>>
>> When compiled with g++ 4.1.2 (CXXFLAGS=-O2 -march=pentium4) the
>> operands %0 and %5 get the same memory address, even though they refer
>> to distinct variables (n0 and n2).
>
> It would help to see the types of the variables. Is n2 a pointer?
> Also it would help to see the actual values that wind up getting
> passed in.
n0, n1, n2 are unsigned long (members of the same C++ class, the asm
statement is in a member function), s is unsigned char.
> I think more details would help. For example, run gcc with the -dg
> option, look at FILENAME.xxx.greg, and show us the insn corresponding
> to the asm statement.
This is the full asm statement:
asm("# number_t& number_t::operator>>=(unsigned char s)\n"
" shrdl %6, %4, %3\n"
" movl %3, %0\n"
" movl %5, %2\n"
" shrdl %6, %2, %1\n"
" shrl %6, %2\n"
: "=&rm" (n0), "=&r" (n1), "=&r" (n2)
: "2" (n0), "1" (n1), "g" (n2), "cI" (s)
);
The code generated is the following:
shrdl %cl, %esi, %eax
movl %eax, -4384(%ebp)
movl -4384(%ebp), %eax
shrdl %cl, %eax, %esi
shrl %cl, %eax
As you can see, %0 and %5 both become -4384(%ebp).
See attachment for the output from -dg.
I hope this clarifies the problem.
Thank you!
[-- Attachment #2: test.cpp.37.greg --]
[-- Type: text/plain, Size: 2503 bytes --]
(insn:HI 809 1339 1338 109 (parallel [
(set (mem/c:SI (plus:SI (reg/f:SI 6 bp)
(const_int -4384 [0xffffeee0])) [88 t$n0.805+0 S4 A8])
(asm_operands:SI ("# number_t& number_t::operator>>=(unsigned char s)
shrdl %6, %4, %3
movl %3, %0
movl %5, %2
shrdl %6, %2, %1
shrl %6, %2
") ("=&rm") 0 [
(reg:SI 0 ax)
(reg:SI 4 si)
(mem/c:SI (plus:SI (reg/f:SI 6 bp)
(const_int -4384 [0xffffeee0])) [88 t$n2+0 S4 A8])
(reg:QI 2 cx)
]
[
(asm_input:SI ("2"))
(asm_input:SI ("1"))
(asm_input:SI ("g"))
(asm_input:QI ("cI"))
] ("i386/number96.h") 148))
(set (reg:SI 4 si)
(asm_operands:SI ("# number_t& number_t::operator>>=(unsigned char s)
shrdl %6, %4, %3
movl %3, %0
movl %5, %2
shrdl %6, %2, %1
shrl %6, %2
") ("=&r") 1 [
(reg:SI 0 ax)
(reg:SI 4 si)
(mem/c:SI (plus:SI (reg/f:SI 6 bp)
(const_int -4384 [0xffffeee0])) [88 t$n2+0 S4 A8])
(reg:QI 2 cx)
]
[
(asm_input:SI ("2"))
(asm_input:SI ("1"))
(asm_input:SI ("g"))
(asm_input:QI ("cI"))
] ("i386/number96.h") 148))
(set (reg:SI 0 ax)
(asm_operands:SI ("# number_t& number_t::operator>>=(unsigned char s)
shrdl %6, %4, %3
movl %3, %0
movl %5, %2
shrdl %6, %2, %1
shrl %6, %2
") ("=&r") 2 [
(reg:SI 0 ax)
(reg:SI 4 si)
(mem/c:SI (plus:SI (reg/f:SI 6 bp)
(const_int -4384 [0xffffeee0])) [88 t$n2+0 S4 A8])
(reg:QI 2 cx)
]
[
(asm_input:SI ("2"))
(asm_input:SI ("1"))
(asm_input:SI ("g"))
(asm_input:QI ("cI"))
] ("i386/number96.h") 148))
(clobber (reg:QI 19 dirflag))
(clobber (reg:QI 18 fpsr))
(clobber (reg:QI 17 flags))
]) -1 (nil)
(nil))
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Inline assembly constraints question
2008-08-20 13:47 ` Jeroen Demeyer
@ 2008-08-20 19:31 ` Ian Lance Taylor
0 siblings, 0 replies; 4+ messages in thread
From: Ian Lance Taylor @ 2008-08-20 19:31 UTC (permalink / raw)
To: Jeroen Demeyer; +Cc: gcc-help
Jeroen Demeyer <jdemeyer@cage.ugent.be> writes:
> This is the full asm statement:
> asm("# number_t& number_t::operator>>=(unsigned char s)\n"
> " shrdl %6, %4, %3\n"
> " movl %3, %0\n"
> " movl %5, %2\n"
> " shrdl %6, %2, %1\n"
> " shrl %6, %2\n"
> : "=&rm" (n0), "=&r" (n1), "=&r" (n2)
> : "2" (n0), "1" (n1), "g" (n2), "cI" (s)
> );
>
> The code generated is the following:
> shrdl %cl, %esi, %eax
> movl %eax, -4384(%ebp)
> movl -4384(%ebp), %eax
> shrdl %cl, %eax, %esi
> shrl %cl, %eax
>
> As you can see, %0 and %5 both become -4384(%ebp).
> See attachment for the output from -dg.
Thanks for the details. Unfortunately, I am no wiser. As far as I
can tell, this should work correctly. Either you've found a bug, or
I'm missing something.
If you like, and you want to help others avoid this problem, please
file a bug report with the preprocessed source code and command line
at http://gcc.gnu.org/bugzilla/ . For more information about filing
bug reports see http://gcc.gnu.org/bugs.html .
If you just want to fix it for yourself change constraint 0 to "=&r"
or change constraint 5 to "r".
Ian
^ permalink raw reply [flat|nested] 4+ messages in thread
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2008-08-19 16:59 ` Ian Lance Taylor
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