x86_64 ABI question

x86_64 ABI question

[John Fine]

When an unsigned int is passed or returned in a 64-bit register, does 
either the C or C++ ABI specify that the top half of the register 
contain zero?

I am using the Intel 10.0 compiler set for ABI compatibility with GCC 
3.4.6 on Linux.

I have looked at a lot of disassemblies of the generated code.  A few 
times, I have seen the code

mov %eax,%eax

immediately before a function returns an unsigned int, under conditions 
where the low 32 bits of %rax contained the unsigned int to be returned 
and the upper bits were garbage.  That instruction clears the upper bits 
as would be required if the ABI does specify the upper bits contain zero.

I have also seen cases where a function uses %rdi in an address 
expression, when %edi has just been passed in as an unsigned int.  That 
would only be correct if the ABI specifies the top half is zeroed.  If 
incorrect, it would still almost always work, because the top half would 
be cleared for free by almost all code sequences that put an unsigned 
int into a 64 bit register.

But I have also seen cases where, under the same conditions, the 
compiler has generated
mov %edi,%edi
directly before the use of %rdi, even though %edi was just passed in as 
an unsigned int.  I can't tell whether the compiler is just being 
stupid, or whether the ABI doesn't allow it to assume the top half is 
clear, or whether the extra instruction is for some other purpose 
entirely (to affect some obscure aspect of instruction pipelining and/or 
16-byte alignment of the instruction stream).

If the ABI rules were well designed, then they must specify those high 
order bits are zeroed.  In typical code the cases where extra work is 
needed to obey that rule are much rarer than the cases where work could 
be avoided by relying on that rule.

I found AMD's X86_64 ABI document and it specifies that the high 63 bits 
are zeroed when a bool is passed in a 64-bit register, but is says 
nothing about that for other types that might be passed in 64-bit 
registers.  I can't figure out what document gives this sort of 
information for X86_64, GCC, C++

Re: x86_64 ABI question

[Ian Lance Taylor]

John Fine <johnsfine@verizon.net> writes:

> When an unsigned int is passed or returned in a 64-bit register, does
> either the C or C++ ABI specify that the top half of the register
> contain zero?

There are threads on the subject at

http://groups.google.com/group/ia32-abi/browse_thread/thread/f47e0106b21d9269

http://gcc.gnu.org/ml/gcc/2008-01/msg00052.html

Short answer: the ABI does not specify, and gcc's behaviour has
recently changed.

Ian

Re: x86_64 ABI question

[John Fine]

Ian Lance Taylor wrote:
> John Fine <johnsfine@verizon.net> writes:
>
>   
>> When an unsigned int is passed or returned in a 64-bit register, does
>> either the C or C++ ABI specify that the top half of the register
>> contain zero?
>>     
>
> There are threads on the subject at
>
> http://groups.google.com/group/ia32-abi/browse_thread/thread/f47e0106b21d9269
>
> http://gcc.gnu.org/ml/gcc/2008-01/msg00052.html
>
> Short answer: the ABI does not specify, and gcc's behaviour has
> recently changed.
>   
Thankyou, but I don't believe those threads address the same question.

IIUC, those discuss extending a value smaller than int in a register 
whose size is the same as int, in an architecture that isn't x86_64.  
Also that is a situation where the performance optimal design choice for 
the ABI would be not extending.

I'm asking about values whose size is the same as int in registers that 
are bigger in an architecture where the performance optimal design 
choice would be extending.

I'm not saying I assume such choices have been made with enough 
attention to architecture specific considerations that the difference in 
the performance factor alone would make me disregard those threads.  I'm 
saying (and correct me if you are seeing something I'm missing) that 
those threads are very specific to are architecture and case that are 
quite different from the one I asked about.

Re: x86_64 ABI question

[Andrew Haley]

Ian Lance Taylor wrote:
> John Fine <johnsfine@verizon.net> writes:
> 
>> When an unsigned int is passed or returned in a 64-bit register, does
>> either the C or C++ ABI specify that the top half of the register
>> contain zero?
> 
> There are threads on the subject at
> 
> http://groups.google.com/group/ia32-abi/browse_thread/thread/f47e0106b21d9269
> 
> http://gcc.gnu.org/ml/gcc/2008-01/msg00052.html
> 
> Short answer: the ABI does not specify, and gcc's behaviour has
> recently changed.

That's the 32-bit API, innit?  I suppose the 64-bit API, which is the
subject of the question, has the same properties.

Andrew.

Re: x86_64 ABI question

[Andrew Haley]

John Fine wrote:

> I'm not saying I assume such choices have been made with enough
> attention to architecture specific considerations that the difference in
> the performance factor alone would make me disregard those threads.  I'm
> saying (and correct me if you are seeing something I'm missing) that
> those threads are very specific to are architecture and case that are
> quite different from the one I asked about.

Yes, but I suspect the answer would be the same.  The change
to gcc is generic, and affects all targets.

HJ, are you listening?  Is there a separate 64-bit discussion list?

Andrew.