From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28314 invoked by alias); 13 Oct 2011 12:01:17 -0000 Received: (qmail 28302 invoked by uid 22791); 13 Oct 2011 12:01:16 -0000 X-SWARE-Spam-Status: No, hits=-6.9 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,SPF_HELO_PASS X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 13 Oct 2011 12:00:48 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p9DC0kEp002225 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 13 Oct 2011 08:00:46 -0400 Received: from zebedee.pink (ovpn-113-55.phx2.redhat.com [10.3.113.55]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p9DC0jsZ025688; Thu, 13 Oct 2011 08:00:46 -0400 Message-ID: <4E96D2ED.2010106@redhat.com> Date: Thu, 13 Oct 2011 12:01:00 -0000 From: Andrew Haley User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.23) Gecko/20110928 Fedora/3.1.15-1.fc14 Thunderbird/3.1.15 MIME-Version: 1.0 To: gcc-help@gcc.gnu.org Subject: Re: gcc optimises out test of value in register-only loop References: <4E96CD98.5070704@redhat.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact gcc-help-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-help-owner@gcc.gnu.org X-SW-Source: 2011-10/txt/msg00091.txt.bz2 On 10/13/2011 12:56 PM, MikeW wrote: > Andrew Haley redhat.com> writes: > >> >> On 10/13/2011 12:23 PM, MikeW wrote: >>> sh4-linux-gcc (GCC) 4.2.4 [unfortunately the version is tied to the >>> kernel build. ] >>> >>> In some kernel code where RAM is unavailable due to manipulation of > the MMU, >>> I wanted to place some 'got here' stops in the code so I could > ^C break in gdb, >>> reset a register value and allow execution to continue. >>> >>> Accordingly I tried: >>> volatile register int stop_loop __asm("r5")__; >>> ... >>> stop_loop = 0x1234; >>> (disable MMU) >>> while (stop_loop != 0); >>> ... >>> >>> which seemed to generate code that checks the value of r5 only once: >>> >>> xxxx08: mov r5,r1 >>> xxxx0a: tst r1,r1 >>> xxxx0c: bf xxxx0c ;r5 never tested again!! >>> xxxx0e: (unrelated code) >>> >>> I also tried >>> while ((volatile)stop_loop != 0); >>> and >>> while ((volatile)(stop_loop != 0)); >>> >>> which both gave the original asm code as above. >>> >>> So, in short, is there any way to persuade gcc to reload r5 - which could >>> in other non-debug situations be a global register variable updated >>> in an ISR, for example. >> >> I don't think so. If every there was a case for "use asm", it's surely >> this. > > Looks like the 'volatile' attribute does not work when registers are involved, > even though various language standard documents just mention "access to > an object" rather than stating that the qualifier only applies to > in-memory "objects". Indeed, and nowhere does it state what constitutes an access. Besides, named register variables is a gcc extension. > The generated code would imply: > > if (stop_loop != 0) { > while (1); > } > > which is not equivalent to my source ! That's true. Maybe we should simply make this case generate a warning. It doesn't make sense on any level, really. Andrew.