gcc optimises out test of value in register-only loop

gcc optimises out test of value in register-only loop

[MikeW]

sh4-linux-gcc (GCC) 4.2.4 [unfortunately the version is tied to the
 kernel build. ]

In some kernel code where RAM is unavailable due to manipulation of the MMU,
I wanted to place some 'got here' stops in the code so I could ^C break in gdb,
reset a register value and allow execution to continue.

Accordingly I tried:
  volatile register int stop_loop __asm("r5")__;
...
  stop_loop = 0x1234;
  (disable MMU)
  while (stop_loop != 0);
...

which seemed to generate code that checks the value of r5 only once:

xxxx08: mov r5,r1
xxxx0a: tst r1,r1
xxxx0c: bf xxxx0c   ;r5 never tested again!!
xxxx0e: (unrelated code)

I also tried
  while ((volatile)stop_loop != 0);
and
  while ((volatile)(stop_loop != 0));

which both gave the original asm code as above.

So, in short, is there any way to persuade gcc to reload r5 - which could
in other non-debug situations be a global register variable updated
in an ISR, for example.

Or perhaps this is 'fixed' in a later gcc ...

Re: gcc optimises out test of value in register-only loop

[Andrew Haley]

On 10/13/2011 12:23 PM, MikeW wrote:
> sh4-linux-gcc (GCC) 4.2.4 [unfortunately the version is tied to the
>  kernel build. ]
> 
> In some kernel code where RAM is unavailable due to manipulation of the MMU,
> I wanted to place some 'got here' stops in the code so I could ^C break in gdb,
> reset a register value and allow execution to continue.
> 
> Accordingly I tried:
>   volatile register int stop_loop __asm("r5")__;
> ...
>   stop_loop = 0x1234;
>   (disable MMU)
>   while (stop_loop != 0);
> ...
> 
> which seemed to generate code that checks the value of r5 only once:
> 
> xxxx08: mov r5,r1
> xxxx0a: tst r1,r1
> xxxx0c: bf xxxx0c   ;r5 never tested again!!
> xxxx0e: (unrelated code)
> 
> I also tried
>   while ((volatile)stop_loop != 0);
> and
>   while ((volatile)(stop_loop != 0));
> 
> which both gave the original asm code as above.
> 
> So, in short, is there any way to persuade gcc to reload r5 - which could
> in other non-debug situations be a global register variable updated
> in an ISR, for example.

I don't think so.  If every there was a case for "use asm", it's surely
this.

Andrew.

Re: gcc optimises out test of value in register-only loop

[MikeW]

Andrew Haley <aph <at> redhat.com> writes:

> 
> On 10/13/2011 12:23 PM, MikeW wrote:
> > sh4-linux-gcc (GCC) 4.2.4 [unfortunately the version is tied to the
> >  kernel build. ]
> > 
> > In some kernel code where RAM is unavailable due to manipulation of
 the MMU,
> > I wanted to place some 'got here' stops in the code so I could
 ^C break in gdb,
> > reset a register value and allow execution to continue.
> > 
> > Accordingly I tried:
> >   volatile register int stop_loop __asm("r5")__;
> > ...
> >   stop_loop = 0x1234;
> >   (disable MMU)
> >   while (stop_loop != 0);
> > ...
> > 
> > which seemed to generate code that checks the value of r5 only once:
> > 
> > xxxx08: mov r5,r1
> > xxxx0a: tst r1,r1
> > xxxx0c: bf xxxx0c   ;r5 never tested again!!
> > xxxx0e: (unrelated code)
> > 
> > I also tried
> >   while ((volatile)stop_loop != 0);
> > and
> >   while ((volatile)(stop_loop != 0));
> > 
> > which both gave the original asm code as above.
> > 
> > So, in short, is there any way to persuade gcc to reload r5 - which could
> > in other non-debug situations be a global register variable updated
> > in an ISR, for example.
> 
> I don't think so.  If every there was a case for "use asm", it's surely
> this.
> 
> Andrew.
> 

Looks like the 'volatile' attribute does not work when registers are involved,
even though various language standard documents just mention "access to
an object" rather than stating that the qualifier only applies to
in-memory "objects".

The generated code would imply:

if (stop_loop != 0) {
  while (1);
}

which is not equivalent to my source !

Re: gcc optimises out test of value in register-only loop

[Thomas Martitz]

Am 13.10.2011 13:56, schrieb MikeW:
> Looks like the 'volatile' attribute does not work when registers are involved,
> even though various language standard documents just mention "access to
> an object" rather than stating that the qualifier only applies to
> in-memory "objects".
>

Does the standard even know about non-memory objects, i.e. registers?

Best regards.

Re: gcc optimises out test of value in register-only loop

[Andrew Haley]

On 10/13/2011 12:56 PM, MikeW wrote:
> Andrew Haley <aph <at> redhat.com> writes:
> 
>>
>> On 10/13/2011 12:23 PM, MikeW wrote:
>>> sh4-linux-gcc (GCC) 4.2.4 [unfortunately the version is tied to the
>>>  kernel build. ]
>>>
>>> In some kernel code where RAM is unavailable due to manipulation of
>  the MMU,
>>> I wanted to place some 'got here' stops in the code so I could
>  ^C break in gdb,
>>> reset a register value and allow execution to continue.
>>>
>>> Accordingly I tried:
>>>   volatile register int stop_loop __asm("r5")__;
>>> ...
>>>   stop_loop = 0x1234;
>>>   (disable MMU)
>>>   while (stop_loop != 0);
>>> ...
>>>
>>> which seemed to generate code that checks the value of r5 only once:
>>>
>>> xxxx08: mov r5,r1
>>> xxxx0a: tst r1,r1
>>> xxxx0c: bf xxxx0c   ;r5 never tested again!!
>>> xxxx0e: (unrelated code)
>>>
>>> I also tried
>>>   while ((volatile)stop_loop != 0);
>>> and
>>>   while ((volatile)(stop_loop != 0));
>>>
>>> which both gave the original asm code as above.
>>>
>>> So, in short, is there any way to persuade gcc to reload r5 - which could
>>> in other non-debug situations be a global register variable updated
>>> in an ISR, for example.
>>
>> I don't think so.  If every there was a case for "use asm", it's surely
>> this.
> 
> Looks like the 'volatile' attribute does not work when registers are involved,
> even though various language standard documents just mention "access to
> an object" rather than stating that the qualifier only applies to
> in-memory "objects".

Indeed, and nowhere does it state what constitutes an access.  Besides, named
register variables is a gcc extension.

> The generated code would imply:
> 
> if (stop_loop != 0) {
>   while (1);
> }
> 
> which is not equivalent to my source !

That's true.  Maybe we should simply make this case generate a warning.
It doesn't make sense on any level, really.

Andrew.

Re: gcc optimises out test of value in register-only loop

[MikeW]

Andrew Haley <aph <at> redhat.com> writes:

> 
> On 10/13/2011 12:23 PM, MikeW wrote:
...

> 
> I don't think so.  If every there was a case for "use asm", it's surely
> this.
> 
> Andrew.
> 
> 

PS Thanks, Andrew.

Re: gcc optimises out test of value in register-only loop

[MikeW]

Andrew Haley <aph <at> redhat.com> writes:

> 
> On 10/13/2011 12:56 PM, MikeW wrote:
> > 
> > Looks like the 'volatile' attribute does not work when registers
 are involved,
> > even though various language standard documents just mention "access to
> > an object" rather than stating that the qualifier only applies to
> > in-memory "objects".
> 
> Indeed, and nowhere does it state what constitutes an access.
  Besides, named
> register variables is a gcc extension.
> 
> > The generated code would imply:
> > 
> > if (stop_loop != 0) {
> >   while (1);
> > }
> > 
> > which is not equivalent to my source !
> 
> That's true.  Maybe we should simply make this case generate a warning.
> It doesn't make sense on any level, really.
> 
> Andrew.
> 
> 

I would certainly like there to be some way to ensure that an
expression in a loop gets (re) evaluated, in a 'volatile' context.



gmane padding..............................
gmane padding..............................

Re: gcc optimises out test of value in register-only loop

[Andrew Haley]

On 10/13/2011 01:14 PM, MikeW wrote:
> 
> I would certainly like there to be some way to ensure that an
> expression in a loop gets (re) evaluated, in a 'volatile' context.

For this, or something else?  We already know that solving
this particular problem only involves replacing a register
variable declaration with a trivial asm that reads from the
register.

Andrew.

Re: gcc optimises out test of value in register-only loop

[Ian Lance Taylor]

MikeW <mw_phil@yahoo.co.uk> writes:

>   volatile register int stop_loop __asm("r5")__;

gcc does not support volatile register variables.  I think it could be
meaningful, but it has never worked.

Ian

Re: gcc optimises out test of value in register-only loop

[Andrew Haley]

On 10/14/2011 05:41 AM, Ian Lance Taylor wrote:
> MikeW <mw_phil@yahoo.co.uk> writes:
> 
>>   volatile register int stop_loop __asm("r5")__;
> 
> gcc does not support volatile register variables.  I think it could be
> meaningful, but it has never worked.

It would be really nasty to implement: we'd have to check for volatility
on every access to a hard register.  The benefits don't seem worth it,
IMO.

Andrew.

Re: gcc optimises out test of value in register-only loop

[Ian Lance Taylor]

Andrew Haley <aph@redhat.com> writes:

> On 10/14/2011 05:41 AM, Ian Lance Taylor wrote:
>> MikeW <mw_phil@yahoo.co.uk> writes:
>> 
>>>   volatile register int stop_loop __asm("r5")__;
>> 
>> gcc does not support volatile register variables.  I think it could be
>> meaningful, but it has never worked.
>
> It would be really nasty to implement: we'd have to check for volatility
> on every access to a hard register.  The benefits don't seem worth it,
> IMO.

No, it's not that bad.  At the tree level, we would only have to check
on every reference to a DECL for which DECL_REGISTER is true.  When
expanding to RTL, we would replace each reference with a special
UNSPEC_VOLATILE which we handle specially when generating asm code.  Or
perhaps simply expand each reference to a specially handled asm
statement.

Ian

Re: gcc optimises out test of value in register-only loop

[Andrew Haley]

On 10/15/2011 04:19 AM, Ian Lance Taylor wrote:
> Andrew Haley <aph@redhat.com> writes:
> 
>> On 10/14/2011 05:41 AM, Ian Lance Taylor wrote:
>>> MikeW <mw_phil@yahoo.co.uk> writes:
>>>
>>>>   volatile register int stop_loop __asm("r5")__;
>>>
>>> gcc does not support volatile register variables.  I think it could be
>>> meaningful, but it has never worked.
>>
>> It would be really nasty to implement: we'd have to check for volatility
>> on every access to a hard register.  The benefits don't seem worth it,
>> IMO.
> 
> No, it's not that bad.  At the tree level, we would only have to check
> on every reference to a DECL for which DECL_REGISTER is true.  When
> expanding to RTL, we would replace each reference with a special
> UNSPEC_VOLATILE which we handle specially when generating asm code.  Or
> perhaps simply expand each reference to a specially handled asm
> statement.

Ah yes, that would indeed work.

Still doesn't seem worth it!  :-)

Andrew.