public inbox for gcc-help@gcc.gnu.org
 help / color / mirror / Atom feed
* Hazard Detection
@ 2006-12-12 14:52 zneda
  0 siblings, 0 replies; 5+ messages in thread
From: zneda @ 2006-12-12 14:52 UTC (permalink / raw)
  To: gcc-help; +Cc: neda.zf



Hi

I have a question: I compiled a program with  gcc
-mips1 ,
Compiler generate this list of instructions:
  
...               ....    
          ...
  10b71c:  
 87a20018      lh      
 v0,24(sp)
  10b720:    00000000    
nop
  10b724:    144000b9     bnez  
 v0,10ba0c
  10b728:    0015ac03    
 sra      s5,s5,0x10
   ...    
          ....          
    ...

but by a small change, some times in
variables, (using same compiler
switches) compiler don't insert
 nop between load and branch and generates
this sequence of
instructions:
   ...            
  ....               ...

 10b754:    87a20018     lh      
  v0,24(sp)
  10b758:    144000b9    
bnez     v0,10ba40
  10b75c:    0015ac03
     sra       s5,s5,0x10
   ...
              ....      
        ...

would you please tell me the
reason?

why doesn't compiler detect hazard always?

Thanks in advanced.

Neda Zolfaghari (zneda@aut.ac.ir)

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: Hazard Detection
  2006-12-12 18:31 ` Meissner, Michael
@ 2006-12-12 23:22   ` Ian Lance Taylor
  0 siblings, 0 replies; 5+ messages in thread
From: Ian Lance Taylor @ 2006-12-12 23:22 UTC (permalink / raw)
  To: Meissner, Michael; +Cc: zneda, gcc-help, neda.zf

"Meissner, Michael" <michael.meissner@amd.com> writes:

> I haven't programmed in the MIPS for awhile, but when I did, GCC
> expected the assembler to do the hazard detection (ie, if you
> disassemble the object code, there should be a NOP between the lh and
> the bnez if -mips1 was passed to the assembler.  GCC used to have a
> separate hazard detection pass many years ago, but it was removed when
> GAS added the support.

gcc did get hazard detection added back in again, though, and gcc can
now generate the whole function in .set noreorder.  See, e.g.,
mips_avoid_hazard in config/mips/mips.c.

I don't know what the original problem is here.  It may be a bug, or
gcc may be in a mode in which it expects the assembler to insert the
nop, or it may be necessary to use an appropriate -march option, or it
may be something else entirely.

Ian

^ permalink raw reply	[flat|nested] 5+ messages in thread
* RE: Hazard Detection
  2006-12-12 14:37 zneda
@ 2006-12-12 18:31 ` Meissner, Michael
  2006-12-12 23:22   ` Ian Lance Taylor
  0 siblings, 1 reply; 5+ messages in thread
From: Meissner, Michael @ 2006-12-12 18:31 UTC (permalink / raw)
  To: zneda, gnu, gcc-help; +Cc: neda.zf

> -----Original Message-----
> From: gcc-help-owner@gcc.gnu.org [mailto:gcc-help-owner@gcc.gnu.org]
On
> Behalf Of zneda@ce.aut.ac.ir
> Sent: Tuesday, December 12, 2006 9:44 AM
> To: gnu@gnu.org; gcc-help@gcc.gnu.org
> Cc: neda.zf@gmail.com
> Subject: Hazard Detection
> 
> Hi
> 
> I have a question: I compiled a program with  gcc -mips1 ,
> Compiler generate this list of instructions:
>    ...               ....               ...
>   10b71c:    87a20018      lh        v0,24(sp)
>   10b720:    00000000     nop
>   10b724:    144000b9     bnez    v0,10ba0c
>   10b728:    0015ac03      sra      s5,s5,0x10
>    ...               ....               ...
> 
> but by a small change, some times in variables, (using same compiler
> switches) compiler don't insert  nop between load and branch and
generates
> this sequence of instructions:
>    ...               ....               ...
>   10b754:    87a20018     lh         v0,24(sp)
>   10b758:    144000b9     bnez     v0,10ba40
>   10b75c:    0015ac03      sra       s5,s5,0x10
>    ...               ....               ...
> 
> would you please tell me the reason?
> 
> why doesn't compiler detect hazard always?
> 
> Thanks in advanced.

I haven't programmed in the MIPS for awhile, but when I did, GCC
expected the assembler to do the hazard detection (ie, if you
disassemble the object code, there should be a NOP between the lh and
the bnez if -mips1 was passed to the assembler.  GCC used to have a
separate hazard detection pass many years ago, but it was removed when
GAS added the support.


^ permalink raw reply	[flat|nested] 5+ messages in thread
* Hazard Detection
@ 2006-12-12 14:56 zneda
  0 siblings, 0 replies; 5+ messages in thread
From: zneda @ 2006-12-12 14:56 UTC (permalink / raw)
  To: gcc-help; +Cc: neda.zf



Hi

I have a question:
I compiled a program with gcc -mips1 ,
Compiler
generate this list of instructions:
 
      ...          
           ....             
          ...
 10b71c:   
  87a20018         lh      
    v0,24(sp)
 10b720:     
00000000        nop
 10b724:      144000b9      
  bnez    v0,10ba0c
 10b728: 
    0015ac03         sra  
      s5,s5,0x10
  ...     
                  ....     
                   
       ...

but by a small change, some
times in variables, (using same compiler
switches) compiler don't
insert nop between load and
branch and generates
this sequence of
instructions:

  ...         
....                 ...
10b754:      87a20018       lh   
        v0,24(sp)
10b758: 
    144000b9       bnez      
v0,10ba40
10b75c:      0015ac03     
sra            s5,s5,0x10
 
...                  
    ....              
          ...

would you please tell me
the reason?

why doesn't compiler detect hazard always?

Thanks in advanced.

Neda Zolfaghari (zneda@aut.ac.ir)

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Hazard Detection
@ 2006-12-12 14:37 zneda
  2006-12-12 18:31 ` Meissner, Michael
  0 siblings, 1 reply; 5+ messages in thread
From: zneda @ 2006-12-12 14:37 UTC (permalink / raw)
  To: gnu, gcc-help; +Cc: neda.zf

Hi

I have a question: I compiled a program with  gcc -mips1 ,
Compiler generate this list of instructions:
   ...               ....               ...
  10b71c:    87a20018      lh        v0,24(sp)
  10b720:    00000000     nop
  10b724:    144000b9     bnez    v0,10ba0c
  10b728:    0015ac03      sra      s5,s5,0x10
   ...               ....               ...

but by a small change, some times in variables, (using same compiler
switches) compiler don't insert  nop between load and branch and generates
this sequence of instructions:
   ...               ....               ...
  10b754:    87a20018     lh         v0,24(sp)
  10b758:    144000b9     bnez     v0,10ba40
  10b75c:    0015ac03      sra       s5,s5,0x10
   ...               ....               ...

would you please tell me the reason?

why doesn't compiler detect hazard always?

Thanks in advanced.

Neda Zolfaghari (zneda@aut.ac.ir)


^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2006-12-12 23:22 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2006-12-12 14:52 Hazard Detection zneda
  -- strict thread matches above, loose matches on Subject: below --
2006-12-12 14:56 zneda
2006-12-12 14:37 zneda
2006-12-12 18:31 ` Meissner, Michael
2006-12-12 23:22   ` Ian Lance Taylor

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).