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From: dw <limegreensocks@yahoo.com>
To: "gcc-help@gcc.gnu.org" <gcc-help@gcc.gnu.org>
Subject: Question about __builtin_ia32_mfence and memory barriers
Date: Tue, 04 Jun 2013 22:58:00 -0000	[thread overview]
Message-ID: <51AE7119.5090000@yahoo.com> (raw)

The discussion below assumes 64bit code on an i386 processor.

My understanding is that the way to do a memory barrier in gcc is:

     asm ("" ::: "memory");

This creates a ReadWriteBarrier, but no processor fence.  To create a 
processor fence, you could do something like

     __builtin_ia32_mfence();

This will generate an mfence instruction, but (assembly code inspection 
suggests) no memory barrier.  I thought about just putting one after the 
other:

     asm ("" ::: "memory");
__builtin_ia32_mfence();

And this leads to my questions:

1) Am I right that __builtin_ia32_mfence() does not generate a memory 
barrier?
1) Is this "two statement thing" guaranteed to be safe?  Could the 
optimizer re-order instructions moving code in between the two? (Yes, I 
realize that the asm statement doesn't actually generate any output.  
But given my understanding of how the compiler processes code, I believe 
the question is still valid).
2) If it is not guaranteed to be safe, what is the use of 
__builtin_ia32_mfence()?  What value is there in preventing the 
*processor* from executing statements out of order if the *compiler* is 
just going to move them around?

I expect this would always work:

     asm ("mfence" ::: "memory");

But I would rather use the builtins if possible.

dw

             reply	other threads:[~2013-06-04 22:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-04 22:58 dw [this message]
2013-06-04 23:52 ` Ian Lance Taylor
2013-06-05  2:45   ` dw
2013-06-05  4:30     ` Ian Lance Taylor
2013-06-12  8:15   ` dw
2013-06-12 19:01     ` Ian Lance Taylor
2013-06-13  2:55       ` dw
2013-06-13  3:01       ` Chung-Ju Wu
2013-06-13  3:25         ` Ian Lance Taylor
2013-06-13  3:44         ` dw

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