From: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
To: Enrico Tabanelli <enrico.tabanelli3@unibo.it>,
"gcc-help@gcc.gnu.org" <gcc-help@gcc.gnu.org>
Subject: Re: Builiding not optimized Libgcc for ARM Cortex-M4 target
Date: Thu, 3 Dec 2020 11:59:10 +0000 [thread overview]
Message-ID: <82cbc439-9a7d-c999-6257-1b44052e4087@foss.arm.com> (raw)
In-Reply-To: <VE1PR01MB5933B68F46D989B372C22455C3FB0@VE1PR01MB5933.eurprd01.prod.exchangelabs.com>
On 24/11/2020 20:47, Enrico Tabanelli via Gcc-help wrote:
> Good morning,
>
> I am trying to compile Libgcc for the ARM Cortex-M4 target from scratch since I need to compare Floating Point SW emulation on an ARM Cortex-M4 and Risc-V based processors. By default, GCC includes an optimized version of the FP SW emulation routines, ieee754-sf.S, which is included in the ARM back-end of Libgcc. For my work, I would like to use the basic routines included in libgcc/softfp.
> Does anyone know how to exclude ieee754-sf.S in the libgcc building process? In particular, how to configure GCC and if there is something to change inside the ARM back-end?
>
> Thanks,
> Enrico Tabanelli
>
I think you'd need to hack the build system. I'm not aware of any
standard configuration hooks to do this.
R.
next prev parent reply other threads:[~2020-12-03 11:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-24 20:47 Enrico Tabanelli
2020-12-03 11:59 ` Richard Earnshaw [this message]
2020-12-03 21:24 ` Enrico Tabanelli
2020-12-07 13:00 ` Richard Earnshaw
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