From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by sourceware.org (Postfix) with ESMTP id 138D13857039 for ; Thu, 22 Oct 2020 23:47:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 138D13857039 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-445-xm1kpFDCMEeJepQNi1EkKQ-1; Thu, 22 Oct 2020 19:47:30 -0400 X-MC-Unique: xm1kpFDCMEeJepQNi1EkKQ-1 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 7B8DC107AFB6; Thu, 22 Oct 2020 23:47:29 +0000 (UTC) Received: from localhost.localdomain (ovpn-112-84.phx2.redhat.com [10.3.112.84]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2B8D75D9CC; Thu, 22 Oct 2020 23:47:29 +0000 (UTC) Subject: Re: How to recognize registers after reload ?. To: Segher Boessenkool Cc: Henri Cloetens , gcc-help References: <20201022222438.GX2672@gate.crashing.org> From: Jeff Law Message-ID: <82fed76c-e343-a155-4b3d-ef8ab07d2baf@redhat.com> Date: Thu, 22 Oct 2020 17:47:28 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: <20201022222438.GX2672@gate.crashing.org> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Content-Language: en-US X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, NICE_REPLY_A, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-help@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-help mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Oct 2020 23:47:34 -0000 On 10/22/20 4:24 PM, Segher Boessenkool wrote: > On Thu, Oct 22, 2020 at 03:30:08PM -0600, Jeff Law via Gcc-help wrote: >> On 10/22/20 2:02 AM, Henri Cloetens wrote: >>> Motivation for the split was problems with the "combine" step. Suppose >>> following code: >>>     *a = 10. >>>     Even if my front_end (define_expand) splits this in >>>     r100 = 10 >>>    *r101 = r100 >>>    the combine step, if these is only one movesi_internal, willl group >>> it again, to then find out >>>    there is no instruction pattern. >> This is an indication the insn's condition or operand's predicate or >> operand constraints are wrong. > Yes, but I do not understand what Henri means at all. > > On one side, combine will try to combine any such pair, and then it > does discover there is no insn for that, and then not do the > combination. This is exactly what combine is supposed to do. > > On the other side, it could mean combine *does* allow the combo. Then, > you *do* have a define_insn for it, or it would *not* allow it. And > then some time later that is a problem? But that has nothing to do with > combine, that just is a buggy machine description. > > (My money is on the predicate btw ;-) ) I'd bet on the predicates and the insn condition.  I wouldn't be surprised at all if this is a risc-like architecture where only one operand can be a non-register.  Predicates can't really describe that, so it's usually handled in the insn predicate. jeff > > > Segher >