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* Handling pre-increment and post-increment in GCC
       [not found] <8731bc0e0610190331qb948c90vcc780be78e563ce2@mail.gmail.com>
@ 2006-10-19 10:37 ` Manjunath B S
  2006-10-19 10:51   ` Andrew Haley
  2006-10-19 11:08   ` Rupert Wood
  0 siblings, 2 replies; 6+ messages in thread
From: Manjunath B S @ 2006-10-19 10:37 UTC (permalink / raw)
  To: gcc-help

Hello All,
    I am trying to understand how GCC handles this piece of code, but
unfortunately the behaviour is different on different architectures
=====================================================
#include < stdio.h>

int main(void)
{
    int i = 2;

    return printf("Post increment : %d, Pre increment : %d\n", i++, ++i);
}
=====================================================

On Powerpc (Powerbook G4) this gives
%%%%%%%%%%%%%%%%%%%
Post increment : 2, Pre increment : 4

however on Intel machines this gives
%%%%%%%%%%%%%%%%%%%
Post increment : 4, Pre increment : 2

On MIPS & ARM, the behaviour is different as well.

Can anyone please explain the same?? Also can anyone please point me
the direction where I should look in the GCC Internals for a clear
understanding??

Regards,
/Manjunath B.S.



-- 
No fear, no guilt, no shame, this is all that takes to be a man!!

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Handling pre-increment and post-increment in GCC
  2006-10-19 10:37 ` Handling pre-increment and post-increment in GCC Manjunath B S
@ 2006-10-19 10:51   ` Andrew Haley
  2006-10-19 11:08   ` Rupert Wood
  1 sibling, 0 replies; 6+ messages in thread
From: Andrew Haley @ 2006-10-19 10:51 UTC (permalink / raw)
  To: Manjunath B S; +Cc: gcc-help

Manjunath B S writes:

 >     I am trying to understand how GCC handles this piece of code, but
 > unfortunately the behaviour is different on different architectures
 > =====================================================
 > #include < stdio.h>
 > 
 > int main(void)
 > {
 >     int i = 2;
 > 
 >     return printf("Post increment : %d, Pre increment : %d\n", i++, ++i);
 > }
 > =====================================================
 > 
 > On Powerpc (Powerbook G4) this gives
 > %%%%%%%%%%%%%%%%%%%
 > Post increment : 2, Pre increment : 4
 > 
 > however on Intel machines this gives
 > %%%%%%%%%%%%%%%%%%%
 > Post increment : 4, Pre increment : 2
 > 
 > On MIPS & ARM, the behaviour is different as well.
 > 
 > Can anyone please explain the same?? Also can anyone please point me
 > the direction where I should look in the GCC Internals for a clear
 > understanding??

It doesn't matter, because Your code is undefined on any C compiler on
any machine.  See C99, Section 6.5 Para. 2.

Andrew.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: Handling pre-increment and post-increment in GCC
  2006-10-19 10:37 ` Handling pre-increment and post-increment in GCC Manjunath B S
  2006-10-19 10:51   ` Andrew Haley
@ 2006-10-19 11:08   ` Rupert Wood
  2006-10-19 11:28     ` Andrew Haley
  1 sibling, 1 reply; 6+ messages in thread
From: Rupert Wood @ 2006-10-19 11:08 UTC (permalink / raw)
  To: 'Manjunath B S'; +Cc: gcc-help

Manjunath B S wrote:

> return printf("Post increment : %d, Pre increment : %d\n", i++, ++i);

You should avoid this sort of thing if possible. The C standard makes no
guarantees about the order of evaluation in cases like this; this is
undefined behaviour.

In practice, how this is evaluated will depend on each architecture's ABI.
i686 ABIs, for example, do not generally pass function arguments in
registers but instead on the stack: in order for a varargs function like
printf() to find its arguments in the correct order they must be placed on
the stack from right to left and so are generally evaluated that way. (That
said, I don't understand what you're seeing: I would expect ++i to be
evaluated before i++ and so you'd see 3,3. However your optimisation options
may change this.) I don't know the PowerPC ABI but as the PowerPC has many
more registers I expect that some arguments will be passed in registers even
for varargs functions: in that case it doesn't matter which order the
compiler evaluates i++ and ++i in since it can store them in any order, so
as you can see this is evaluated left-to-right - but if you add many more
arguments to your printf then you may see a different evaluation order for
later arguments that do get passed on the stack.

So in summary: you'd do better to avoid this rather than to try and
understand this and fight against it!

Rup.


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^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: Handling pre-increment and post-increment in GCC
  2006-10-19 11:08   ` Rupert Wood
@ 2006-10-19 11:28     ` Andrew Haley
  2006-10-19 11:58       ` Rupert Wood
  0 siblings, 1 reply; 6+ messages in thread
From: Andrew Haley @ 2006-10-19 11:28 UTC (permalink / raw)
  To: Rupert Wood; +Cc: 'Manjunath B S', gcc-help

Rupert Wood writes:
 > Manjunath B S wrote:
 > 
 > > return printf("Post increment : %d, Pre increment : %d\n", i++, ++i);
 > 
 > You should avoid this sort of thing if possible. The C standard makes no
 > guarantees about the order of evaluation in cases like this; this is
 > undefined behaviour.
 > 
 > In practice, how this is evaluated will depend on each architecture's ABI.

No, it's nothing at all to do with the ABI, and it has nothing to do
with the order in which the arguments are evaluated.  Postincrements
may be performaed at any time at all, as long as they are complete
before the next sequence point.  For example, gcc used to queue all
postincrements and emit them at the next sequence point.

Current versions of gcc rewrite everything into static single
assignment form, and they do that before generating any code.  The
translation looks like this:

  i_1 = 2;
  i_2 = i_1 + 1;
  i.10_3 = i_2;
  i_4 = i_2 + 1;
  D.2479_5 = printf (&"Post increment : %d, Pre increment : %d\n"[0], i.10_3, i_4);

 > So in summary: you'd do better to avoid this rather than to try and
 > understand this and fight against it!

That's right: this program is meaningless, and it isn't possible to
say in terms of the semantics of C what it does.

Andrew.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: Handling pre-increment and post-increment in GCC
  2006-10-19 11:28     ` Andrew Haley
@ 2006-10-19 11:58       ` Rupert Wood
  2006-10-19 13:44         ` Manjunath B S
  0 siblings, 1 reply; 6+ messages in thread
From: Rupert Wood @ 2006-10-19 11:58 UTC (permalink / raw)
  To: 'Andrew Haley'; +Cc: 'Manjunath B S', gcc-help

Andrew Haley wrote:

> No, it's nothing at all to do with the ABI, and it has nothing to do
> with the order in which the arguments are evaluated.  Postincrements
> may be performaed at any time at all, as long as they are complete
> before the next sequence point.  For example, gcc used to queue all
> postincrements and emit them at the next sequence point.

OK, thanks for putting me straight. My version came from old observations
(from other compilers too) but I didn't consider how SSA would change it
all. I did see the 3,3 I was expecting from gcc 3.4.6 -O0.

Rup.



______________________________________________________________________
This email has been scanned by the MessageLabs Email Security System.
For more information please visit http://www.messagelabs.com/email 
______________________________________________________________________

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Handling pre-increment and post-increment in GCC
  2006-10-19 11:58       ` Rupert Wood
@ 2006-10-19 13:44         ` Manjunath B S
  0 siblings, 0 replies; 6+ messages in thread
From: Manjunath B S @ 2006-10-19 13:44 UTC (permalink / raw)
  To: Rupert Wood; +Cc: Andrew Haley, gcc-help

Hello All,
    Thanks a lot for the information, I have a much clear picture now.

Regards,
/Manjunath B.S.

On 10/19/06, Rupert Wood <me@rupey.net> wrote:
> Andrew Haley wrote:
>
> > No, it's nothing at all to do with the ABI, and it has nothing to do
> > with the order in which the arguments are evaluated.  Postincrements
> > may be performaed at any time at all, as long as they are complete
> > before the next sequence point.  For example, gcc used to queue all
> > postincrements and emit them at the next sequence point.
>
> OK, thanks for putting me straight. My version came from old observations
> (from other compilers too) but I didn't consider how SSA would change it
> all. I did see the 3,3 I was expecting from gcc 3.4.6 -O0.
>
> Rup.
>
>
>
> ______________________________________________________________________
> This email has been scanned by the MessageLabs Email Security System.
> For more information please visit http://www.messagelabs.com/email
> ______________________________________________________________________
>


-- 
No fear, no guilt, no shame, this is all that takes to be a man!!

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2006-10-19 13:44 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <8731bc0e0610190331qb948c90vcc780be78e563ce2@mail.gmail.com>
2006-10-19 10:37 ` Handling pre-increment and post-increment in GCC Manjunath B S
2006-10-19 10:51   ` Andrew Haley
2006-10-19 11:08   ` Rupert Wood
2006-10-19 11:28     ` Andrew Haley
2006-10-19 11:58       ` Rupert Wood
2006-10-19 13:44         ` Manjunath B S

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