From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32693 invoked by alias); 29 Nov 2012 04:44:02 -0000 Received: (qmail 32654 invoked by uid 22791); 29 Nov 2012 04:43:51 -0000 X-SWARE-Spam-Status: No, hits=-4.8 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,KHOP_RCVD_TRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE,TW_OV,TW_VX X-Spam-Check-By: sourceware.org Received: from mail-qc0-f175.google.com (HELO mail-qc0-f175.google.com) (209.85.216.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 29 Nov 2012 04:43:46 +0000 Received: by mail-qc0-f175.google.com with SMTP id j3so11014732qcs.20 for ; Wed, 28 Nov 2012 20:43:45 -0800 (PST) MIME-Version: 1.0 Received: by 10.49.38.98 with SMTP id f2mr6360113qek.32.1354164225502; Wed, 28 Nov 2012 20:43:45 -0800 (PST) Received: by 10.49.2.105 with HTTP; Wed, 28 Nov 2012 20:43:45 -0800 (PST) In-Reply-To: <50B65B91.3040705@redhat.com> References: <50B65B91.3040705@redhat.com> Date: Thu, 29 Nov 2012 04:44:00 -0000 Message-ID: Subject: Re: GO_IF_LEGITIMATE_ADDRESS handling different addressing modes for load/store From: Ayonam Ray To: Jeff Law Cc: gcc-help@gcc.gnu.org Content-Type: text/plain; charset=ISO-8859-1 Mailing-List: contact gcc-help-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-help-owner@gcc.gnu.org X-SW-Source: 2012-11/txt/msg00214.txt.bz2 Thanks Jeff for the clue. Much appreciated. Regards Ayonam On 29 November 2012 00:14, Jeff Law wrote: > On 11/28/2012 11:37 AM, Ayonam Ray wrote: >> >> Hi, >> >> My architecture allows base + immed and base + index for loads but >> allows only base + immed for stores. How do I differentiate between >> them in the macro GO_IF_LEGITIMATE_ADDRESS? I only get the MEM rtx in >> that macro and have no clue whether the operand is an address for a >> load or a store. Is there any other way that I can differentiate >> between them? > > You can't differentiate them. Fundamentally the register allocator assumes > that a memory address is either valid or invalid regardless of whether or > not it's a load or store. > > What ports have done in the past with this situation is to support the > lowest common denominator in the movxx pattern, then add special constraints > for the cases that are only available on the load (or store). > > For an example, see how indexed addressing modes are handled on the PA. It > has integer indexed loads, but no integer indexed stores. It has indexed > loads and stores for floating point types. > > jeff