From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-help-return-53189-listarch-gcc-help=gcc.gnu.org@gcc.gnu.org>
Received: (qmail 22532 invoked by alias); 13 Jun 2013 03:01:30 -0000
Mailing-List: contact gcc-help-help@gcc.gnu.org; run by ezmlm
Precedence: bulk
List-Id: <gcc-help.gcc.gnu.org>
List-Archive: <http://gcc.gnu.org/ml/gcc-help/>
List-Post: <mailto:gcc-help@gcc.gnu.org>
List-Help: <mailto:gcc-help-help@gcc.gnu.org>
Sender: gcc-help-owner@gcc.gnu.org
Received: (qmail 22499 invoked by uid 89); 13 Jun 2013 03:01:27 -0000
X-Spam-SWARE-Status: No, score=-3.6 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,KHOP_THREADED,RCVD_IN_DNSWL_LOW,RCVD_IN_HOSTKARMA_YE,SPF_PASS,TW_UC autolearn=ham version=3.3.1
Received: from mail-pb0-f41.google.com (HELO mail-pb0-f41.google.com) (209.85.160.41)    by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Thu, 13 Jun 2013 03:01:26 +0000
Received: by mail-pb0-f41.google.com with SMTP id rp16so6360595pbb.28        for <gcc-help@gcc.gnu.org>; Wed, 12 Jun 2013 20:01:25 -0700 (PDT)
MIME-Version: 1.0
X-Received: by 10.66.216.170 with SMTP id or10mr852533pac.31.1371092485452; Wed, 12 Jun 2013 20:01:25 -0700 (PDT)
Received: by 10.68.33.40 with HTTP; Wed, 12 Jun 2013 20:01:25 -0700 (PDT)
In-Reply-To: <CAKOQZ8yhsN2pfitYUdrvbPpAXtPFZYiGGfAkj+N61DzO5tryGw@mail.gmail.com>
References: <51AE7119.5090000@yahoo.com>	<CAKOQZ8yxRncKoRjLcnR5rZnkybtOTAtCoLo9f-OJyCFe47JWEw@mail.gmail.com>	<51B82E29.5000405@yahoo.com>	<CAKOQZ8yhsN2pfitYUdrvbPpAXtPFZYiGGfAkj+N61DzO5tryGw@mail.gmail.com>
Date: Thu, 13 Jun 2013 03:01:00 -0000
Message-ID: <CADj25HMLDCnega78z56y_MtzE3r7XuDDwYgAHQu5dBBPnmNxiQ@mail.gmail.com>
Subject: Re: Question about __builtin_ia32_mfence and memory barriers
From: Chung-Ju Wu <jasonwucj@gmail.com>
To: dw <limegreensocks@yahoo.com>, Ian Lance Taylor <iant@google.com>
Cc: "gcc-help@gcc.gnu.org" <gcc-help@gcc.gnu.org>
Content-Type: text/plain; charset=ISO-8859-1
X-SW-Source: 2013-06/txt/msg00086.txt.bz2

2013/6/13 Ian Lance Taylor <iant@google.com>:
> On Wed, Jun 12, 2013 at 1:15 AM, dw <limegreensocks@yahoo.com> wrote:
[deleted]
>> In fact, I *can* generate failure cases if I comment the
>> __builtin_ia32_mfence() call out of _mm_mfence and replace it with something
>> else (like asm("mfence")).  But as soon as I put the __builtin_ia32_mfence
>> call back in, my "failure scenario" clears right up.
>>
>> In short, it looks like __builtin_ia32_mfence *does* generate a barrier.
>> But so do other builtins (like __builtin_ia32_pause).  Does that even seem
>> possible?  It would be weird if every builtin (or even every ia32 builtin)
>> implied a barrier.
[deleted]
>
> So when I say that as far as I know __builtin_ia32_mfence does not
> generate a barrier, what I mean is that as far as I know after it is
> expanded to RTL there is no barrier.  But I could be wrong.
>
> Ian

I just noticed there is a statement "MEM_VOLATILE_P(operands[0]=1"
for mfence pattern in gcc/config/i386/sync.md:

(define_expand "sse2_mfence"
  [(set (match_dup 0)
        (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))]
  "TARGET_SSE2"
{
  operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[0]) = 1;
})


And so does "pause" pattern in gcc/config/i386/i386.md:

(define_expand "pause"
  [(set (match_dup 0)
        (unspec:BLK [(match_dup 0)] UNSPEC_PAUSE))]
  ""
{
  operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[0]) = 1;
})


According to GCC Internal 10.5, the description says that
"Volatile memory references may not be deleted, reordered or combined."
I think that is why __builtin_ia32_mfence and __builtin_ia32_pause *do*
generate a barrier in dw's experiment.


Best regards,
jasonwucj