From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yb1-xb30.google.com (mail-yb1-xb30.google.com [IPv6:2607:f8b0:4864:20::b30]) by sourceware.org (Postfix) with ESMTPS id E4808385DC35 for ; Wed, 23 Feb 2022 15:07:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E4808385DC35 Received: by mail-yb1-xb30.google.com with SMTP id c6so48627575ybk.3 for ; Wed, 23 Feb 2022 07:07:24 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=iOPRdAVXRJXEwE/9sU5jFFOotnrWBqyLdGxl/1uraDg=; b=jqYJE1tnjnCf4g5M2yuEGBRogKJD0Cr56fbCvKXlg+hE2U9a6W3tTr8XgsMZWFrgtQ tNpAxfLXBJLB49RA+Z9nqKw/wMh5A/hprjbSKwPAo5pErNXvXz2aymF1APITncz/nQwV 57Fc62/I4atJD70BdGmWWeNpwZdO2CbMaEkOYMAvGKBtIjcjjS39KRFt+rNikdmo4rpM KLo9hetq8FLhCBaP5OjOGMTcWSZfTPVuDqz3mc+t+R1dTpya9iQmSdsQHH0i5wH5RX8n DO2SQeFQRhsi509gb2bhF3yX5giT4XZBp+Otu/OEqFLl5rwN+Wn3UtPAfE9ejgCwZUs3 aS7g== X-Gm-Message-State: AOAM533yKtHPOrWwa6aFcFqckRTuzz3jlWInmROSVvr40nfl2KQHEWbz LSEIk9nAPnhFhselnwIAYNsqkwubjcP5P3vMUeDW5C+WE2E= X-Google-Smtp-Source: ABdhPJxZEzISeBQj+flkJShs60MTgQX0UdjlFoCXHc9kjMscpP/uFNU45QrVUYL/oGzjxloUUfw5WSDhvrDVG901xZA= X-Received: by 2002:a25:abee:0:b0:624:6624:16d3 with SMTP id v101-20020a25abee000000b00624662416d3mr120383ybi.491.1645628844243; Wed, 23 Feb 2022 07:07:24 -0800 (PST) MIME-Version: 1.0 References: <20220223002253.GB614@gate.crashing.org> <00a001d82886$7f477db0$7dd67910$@franke.ms> In-Reply-To: <00a001d82886$7f477db0$7dd67910$@franke.ms> From: William Tambe Date: Wed, 23 Feb 2022 09:07:14 -0600 Message-ID: Subject: Re: Make GCC move instructions between a multi-cycle instruction and the next instruction that depends on its result. To: Stefan Franke Cc: gcc-help Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=0.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-help@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-help mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Feb 2022 15:07:26 -0000 On Wed, Feb 23, 2022 at 1:26 AM wrote: > > > -----Urspr=C3=BCngliche Nachricht----- > > Von: Gcc-help Im > > Auftrag von Segher Boessenkool > > Gesendet: Mittwoch, 23. Februar 2022 01:23 > > An: William Tambe > > Cc: gcc-help > > Betreff: Re: Make GCC move instructions between a multi-cycle instructi= on > > and the next instruction that depends on its result. > > > > On Tue, Feb 22, 2022 at 03:15:55PM -0600, William Tambe via Gcc-help > > wrote: > > [snip] > > > > Without above transformation, `add %4 %7` would cause the cpu to > > > > wait on `div %4 %5` when it could have executed instructions that d= o > > > > not depend on the result of "div". > > > > > > How to implement above transformation such that GCC moves instruction= s > > > between a multi-cycle instruction and the next instruction that > > > depends on its result ? > > > > GCC has a pretty advanced instruction scheduler. You can start looking= at > > for example? > > > > You should also look at the md files defining an automaton --> > "define_automaton". > > There you model the pipelines, latency etc.p.p. for the cpu. > Then annotate the insns in the cpu md file with the types from the > automaton. > That information can be used by the scheduler and you may still need to > implement some of the scheduler hooks. > > Start looking at a simple cpu. > Would it be possible and safe to accomplish above transformation using TARGET_MACHINE_DEPENDENT_REORG ? If yes, what functions can be used to move an instruction ? > Stefan >