From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw1-x1131.google.com (mail-yw1-x1131.google.com [IPv6:2607:f8b0:4864:20::1131]) by sourceware.org (Postfix) with ESMTPS id 210823858406 for ; Wed, 23 Feb 2022 00:51:34 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 210823858406 Received: by mail-yw1-x1131.google.com with SMTP id 00721157ae682-2d6d0cb5da4so139172037b3.10 for ; Tue, 22 Feb 2022 16:51:34 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=WSGGx9Gs1CaIoKPiRRxhC/auPtP9m/FJg0VKZuatG9E=; b=y06Qjamth0pbtVCb+Tfv+C7VdpySYr0SEhQoYN8TUpsccKkqXdxecko3qTuAeImGaR 09cnnnzIpUK/ZJMWEOrg6sEuX8uPJzNTpVpP3o6fooNBH/OWAzlQBlfOFYSL5jpMZ5uD K/rOuc1+vap0qumlbcJ5RpNANLXFkHo2hi5y+7kkhPQj+KWJF13lbtWughL9giqdBItN 7AHbIL7ZFWMfNRZIL2AZdpyFENgupBoRS2BzChnfvmD3Cl1uEemqfGPykKyS4LaKoRUX jTgpVKIQnp3V1ZMTDTLJKGAqqX74G0R/7H7VhdWt1Vq6BQq/ZsziZs85knitmizQDn39 AB5A== X-Gm-Message-State: AOAM531xHE17goSUNEOyMUPEf52eBUoE7LDUql61DFsarPTcprmHnKy+ k5X7vSJY0PSpCDn6X4YyziMQCxi/iowTRRaGkxjwI9MaxQk= X-Google-Smtp-Source: ABdhPJyTDaAtMrqRDS8Pbl+zy5BU8UyO5uxVCybYODIVwvWLp3hfImhRANmGWzvMt9o/W5i3kEp7BPiYJcAWWM3578o= X-Received: by 2002:a81:fc7:0:b0:2d6:c228:46bc with SMTP id 190-20020a810fc7000000b002d6c22846bcmr21557478ywp.236.1645577493608; Tue, 22 Feb 2022 16:51:33 -0800 (PST) MIME-Version: 1.0 References: <20220223002253.GB614@gate.crashing.org> In-Reply-To: <20220223002253.GB614@gate.crashing.org> From: William Tambe Date: Tue, 22 Feb 2022 18:51:22 -0600 Message-ID: Subject: Re: Make GCC move instructions between a multi-cycle instruction and the next instruction that depends on its result. To: Segher Boessenkool Cc: gcc-help Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=0.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-help@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-help mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Feb 2022 00:51:35 -0000 On Tue, Feb 22, 2022 at 6:24 PM Segher Boessenkool wrote: > > On Tue, Feb 22, 2022 at 03:15:55PM -0600, William Tambe via Gcc-help wrote: > [snip] > > > Without above transformation, `add %4 %7` would cause the cpu to wait > > > on `div %4 %5` when it could have executed instructions that do not > > > depend on the result of "div". > > > > How to implement above transformation such that GCC moves instructions > > between a multi-cycle instruction and the next instruction that > > depends on its result ? > > GCC has a pretty advanced instruction scheduler. You can start looking > at for example? > Thank you for the pointer; could you suggest an existing example close to what I am looking to implement that uses above TARGET_SCHED_* hooks ? > > Segher