Thumb inline assembly

Thumb inline assembly

[Kalai Rajah N]

Hi,
 I'm trying to do a simple register read through ARM inline assembly.
If I embed the asm in the function directly, it works ...


eg:

#define BAD 0xBAADBAAD
#define GOOD 0x600D600D
#define RESET 0x00000000

#define NVIC_ISER0 0xE000E100

volatile int nvic_iser_status = 0xFFFFFFFF;

function () {


...

asm volatile(
"ldr r2, =8   /* number of register */ \n\t"
"ldr r1, =%0 /* load the nvic_iser* register */ \n\t"
"read_nvic_iser:\n\t"
"sub r2, r2, #1\n\t"
"ldr r0, [r1]\n\t"
"add r1, r1, #4 /* go to the next register */ \n\t"
"cmp r0, %1\n\t"
"beq read_nvic_iser_ok\n\t"
"ldr r3, =%2\n\t"
"str r3, [%4] /* update status flag */\n\t"
"read_nvic_iser_ok:\n\t"
"cmp r2, #0\n\t"
"bne read_nvic_iser\n\t"
"ldr r3, =%3\n\t"
"str r3, [%4] /* update status flag */\n\t"
:
: "i" (NVIC_ISER0), "i" (RESET), "i" (BAD), "i" (GOOD), "r" (&nvic_iser_status)
: "r0", "r1", "r2", "r3"
);

..

}

But, if I want to call the asm through another function, I get errors ..

eg: function (){

 ...
reg_read(NVIC_ISER0, RESET, nvic_iser_status)

..
}

reg_read(int addr, int reset, int status){

asm volatile(
"ldr r2, =8   /* number of register */ \n\t"
"ldr r1, =%0 /* load the nvic_iser* register */ \n\t"
"read_reg:\n\t"
"sub r2, r2, #1\n\t"
"ldr r0, [r1]\n\t"
"add r1, r1, #4 /* go to the next register */ \n\t"
"cmp r0, %1\n\t"
"beq read_reg_ok\n\t"
"ldr r3, =%2\n\t"
"str r3, [%4] /* update status flag */\n\t"
"read_reg_ok:\n\t"
"cmp r2, #0\n\t"
"bne read_reg\n\t"
"ldr r3, =%3\n\t"
"str r3, [%4] /* update status flag */\n\t"
:
: "r" (addr), "r" (reset), "r" (BAD), "r" (GOOD), "r" (status)
: "r0", "r1", "r2", "r3"
//:
);
}

I see the following errors:
/tmp/ccYu7aUS.ltrans0.ltrans.o: In function `read_reg_ok':
ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x60): undefined
reference to `r6'
ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x64): undefined
reference to `r4'
ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x68): undefined
reference to `r5'
collect2: error: ld returned 1 exit status

What am I doing wrong?

thanks,
Kalai

Re: Thumb inline assembly

[Ian Lance Taylor]

On Mon, Jun 10, 2013 at 2:41 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:

>  I'm trying to do a simple register read through ARM inline assembly.
> If I embed the asm in the function directly, it works ...

...

> I see the following errors:
> /tmp/ccYu7aUS.ltrans0.ltrans.o: In function `read_reg_ok':
> ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x60): undefined
> reference to `r6'
> ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x64): undefined
> reference to `r4'
> ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x68): undefined
> reference to `r5'
> collect2: error: ld returned 1 exit status
>
> What am I doing wrong?


Your test case has no mention of r4, r5, or r6.  It always helps to
show a complete standalone test case.

The error messages indicate some confusion: there are references to
symbols using the names of registers.  But I don't know where those
are coming from.

Ian

Re: Thumb inline assembly

[Kalai Rajah N]

Even I'm confused about the errors. when remove the clobber list
"r0", "r1", "r2", "r3", I get undefined reference to r1, r3 and r2.

Here is the generated assembly code
1: when the asm is called directly ... this seems to work

ldr r2, =8   /* number of register */
ldr r1, =#-536813312 /* load the nvic_iser* register */
read_nvic_iser:
sub r2, r2, #1
ldr r0, [r1]
add r1, r1, #4 /* go to the next register */
cmp r0, #0
beq read_nvic_iser_ok
ldr r3, =#-1163018018
str r3, [r4] /* update status flag */
read_nvic_iser_ok:
cmp r2, #0
bne read_nvic_iser
ldr r3, =#1611514078
str r3, [r4] /* update status flag */

2: when the asm gets called through another function ... this is
having the compilation error ...

.thumb_func
.type check_reset_value, %function
check_reset_value:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
push {r4, r5, r6, r7, r8}
sub sp, sp, #20
add r7, sp, #0
str r0, [r7, #12]
str r1, [r7, #8]
str r2, [r7, #4]
ldr r6, [r7, #12]
ldr ip, [r7, #8]
movw r4, #49374
movt r4, 47789
movw r5, #49374
movt r5, 24589
ldr r8, [r7, #4]
@ 24 "nvic_reg_read.c" 1
ldr r2, =8   /* number of register */
ldr r1, =r6 /* load the nvic_iser* register */     <------
read_reg:
sub r2, r2, #1
ldr r0, [r1]
add r1, r1, #4 /* go to the next register */
cmp r0, ip
beq read_reg_ok
ldr r3, =r4                                              <----------
str r3, [r8] /* update status flag */
read_reg_ok:
cmp r2, #0
bne read_reg
ldr r3, =r5                                                 <--------------
str r3, [r8] /* update status flag */

the lines marked with the arrows are where the errors occur.



On Mon, Jun 10, 2013 at 3:51 PM, Ian Lance Taylor <iant@google.com> wrote:
> On Mon, Jun 10, 2013 at 2:41 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
>
>>  I'm trying to do a simple register read through ARM inline assembly.
>> If I embed the asm in the function directly, it works ...
>
> ...
>
>> I see the following errors:
>> /tmp/ccYu7aUS.ltrans0.ltrans.o: In function `read_reg_ok':
>> ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x60): undefined
>> reference to `r6'
>> ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x64): undefined
>> reference to `r4'
>> ccYu7aUS.ltrans0.o:(.text.check_reset_value.4010+0x68): undefined
>> reference to `r5'
>> collect2: error: ld returned 1 exit status
>>
>> What am I doing wrong?
>
>
> Your test case has no mention of r4, r5, or r6.  It always helps to
> show a complete standalone test case.
>
> The error messages indicate some confusion: there are references to
> symbols using the names of registers.  But I don't know where those
> are coming from.
>
> Ian

Re: Thumb inline assembly

[Ian Lance Taylor]

On Mon, Jun 10, 2013 at 4:19 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
>
> .thumb_func

This is a Thumb function.

> push {r4, r5, r6, r7, r8}

As far as I know this is not a Thumb instruction.

I don't know how this gets through the assembler.

Ian

Re: Thumb inline assembly

[Kalai Rajah N]

Do you mean push is not supported or the specific parameters used by
push in this code?

But, from ARM's page, it seems the instruction is fine ...

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0283b/Babefbce.html

On Mon, Jun 10, 2013 at 4:51 PM, Ian Lance Taylor <iant@google.com> wrote:
> On Mon, Jun 10, 2013 at 4:19 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
>>
>> .thumb_func
>
> This is a Thumb function.
>
>> push {r4, r5, r6, r7, r8}
>
> As far as I know this is not a Thumb instruction.
>
> I don't know how this gets through the assembler.
>
> Ian

Re: Thumb inline assembly

[Ian Lance Taylor]

On Mon, Jun 10, 2013 at 5:06 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
> Do you mean push is not supported or the specific parameters used by
> push in this code?
>
> But, from ARM's page, it seems the instruction is fine ...
>
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0283b/Babefbce.html

That page says that in Thumb mode the push instruction only supports
the lo registers.

Ian

> On Mon, Jun 10, 2013 at 4:51 PM, Ian Lance Taylor <iant@google.com> wrote:
>> On Mon, Jun 10, 2013 at 4:19 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
>>>
>>> .thumb_func
>>
>> This is a Thumb function.
>>
>>> push {r4, r5, r6, r7, r8}
>>
>> As far as I know this is not a Thumb instruction.
>>
>> I don't know how this gets through the assembler.
>>
>> Ian

Fwd: Thumb inline assembly

[Kalai Rajah N]

missed the alias when replying back.


---------- Forwarded message ----------
From: Kalai Rajah N <kalairajah@gmail.com>
Date: Mon, Jun 10, 2013 at 5:19 PM
Subject: Re: Thumb inline assembly
To: Ian Lance Taylor <iant@google.com>


If the clobber-list is removed, the errors are on r1,r2, r3 and the
generated assembly code is ...

.thumb_func
.type check_reset_value, %function
check_reset_value:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
push {r4, r7}
sub sp, sp, #16
add r7, sp, #0
str r0, [r7, #12]
str r1, [r7, #8]
str r2, [r7, #4]
ldr r1, [r7, #12]
ldr r0, [r7, #8]
movw r3, #49374
movt r3, 47789
movw r2, #49374
movt r2, 24589
ldr r4, [r7, #4]
@ 24 "nvic_reg_read.c" 1
ldr r2, =8   /* number of register */
ldr r1, =r1 /* load the nvic_iser* register */
read_reg:
sub r2, r2, #1
ldr r0, [r1]
add r1, r1, #4 /* go to the next register */
cmp r0, r0
beq read_reg_ok
ldr r3, =r3
str r3, [r4] /* update status flag */
read_reg_ok:
cmp r2, #0
bne read_reg
ldr r3, =r2
str r3, [r4] /* update status flag */

- here the push seems fine.

On Mon, Jun 10, 2013 at 5:13 PM, Ian Lance Taylor <iant@google.com> wrote:
> On Mon, Jun 10, 2013 at 5:06 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
>> Do you mean push is not supported or the specific parameters used by
>> push in this code?
>>
>> But, from ARM's page, it seems the instruction is fine ...
>>
>> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0283b/Babefbce.html
>
> That page says that in Thumb mode the push instruction only supports
> the lo registers.
>
> Ian
>
>> On Mon, Jun 10, 2013 at 4:51 PM, Ian Lance Taylor <iant@google.com> wrote:
>>> On Mon, Jun 10, 2013 at 4:19 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
>>>>
>>>> .thumb_func
>>>
>>> This is a Thumb function.
>>>
>>>> push {r4, r5, r6, r7, r8}
>>>
>>> As far as I know this is not a Thumb instruction.
>>>
>>> I don't know how this gets through the assembler.
>>>
>>> Ian

Re: Thumb inline assembly

[Ian Lance Taylor]

> From: Kalai Rajah N <kalairajah@gmail.com>
> Date: Mon, Jun 10, 2013 at 5:19 PM
> Subject: Re: Thumb inline assembly
> To: Ian Lance Taylor <iant@google.com>
>
>
> If the clobber-list is removed, the errors are on r1,r2, r3 and the
> generated assembly code is ...

When you clobber r0 through r3 they can't be used as input registers.

I still haven't seen a complete standalone test case, but perhaps GCC
is in ARM mode but you are generating Thumb assembly code.

Ian

Re: Thumb inline assembly

[Kalai Rajah N]

Here is the C code that I used ...

#include <stdio.h>

// NVIC Interrupt Set-Enable Registers
#define NVIC_ISER0 0xE000E100
#define NVIC_ISER1 0xE000E104
#define NVIC_ISER2 0xE000E108
#define NVIC_ISER3 0xE000E10C
#define NVIC_ISER4 0xE000E110
#define NVIC_ISER5 0xE000E114
#define NVIC_ISER6 0xE000E118
#define NVIC_ISER7 0xE000E11C

//reset values
#define RESET 0x00000000

//status flag
#define GOOD 0x600DC0DE
#define DEAD 0xDEADC0DE
#define BAD 0xBAADC0DE

void check_reset_value(int addr, int reset, int status){
asm volatile(
"ldr r2, =8   /* number of register */ \n\t"
"ldr r1, =%0 /* load the nvic_iser* register */ \n\t"
"read_reg:\n\t"
"sub r2, r2, #1\n\t"
"ldr r0, [r1]\n\t"
"add r1, r1, #4 /* go to the next register */ \n\t"
"cmp r0, %1\n\t"
"beq read_reg_ok\n\t"
"ldr r3, =%2\n\t"
"str r3, [%4] /* update status flag */\n\t"
"read_reg_ok:\n\t"
"cmp r2, #0\n\t"
"bne read_reg\n\t"
"ldr r3, =%3\n\t"
"str r3, [%4] /* update status flag */\n\t"
:
: "r" (addr), "r" (reset), "r" (BAD), "r" (GOOD), "r" (status)
//: "r0", "r1", "r2", "r3"
//:
);
}

int main() {
volatile int nvic_iser_status = DEAD;

check_reset_value(NVIC_ISER0, RESET, nvic_iser_status);

}

This is on cortex-m3, so I'm passing -mthumb -mcpu=cortex-m3 to the compiler

On Mon, Jun 10, 2013 at 5:31 PM, Ian Lance Taylor <iant@google.com> wrote:
>> From: Kalai Rajah N <kalairajah@gmail.com>
>> Date: Mon, Jun 10, 2013 at 5:19 PM
>> Subject: Re: Thumb inline assembly
>> To: Ian Lance Taylor <iant@google.com>
>>
>>
>> If the clobber-list is removed, the errors are on r1,r2, r3 and the
>> generated assembly code is ...
>
> When you clobber r0 through r3 they can't be used as input registers.
>
> I still haven't seen a complete standalone test case, but perhaps GCC
> is in ARM mode but you are generating Thumb assembly code.
>
> Ian

Re: Thumb inline assembly

[Ian Lance Taylor]

On Mon, Jun 10, 2013 at 5:41 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:

> "ldr r1, =%0 /* load the nvic_iser* register */ \n\t"

The references are coming from your lines like the above.  I don't
know what this syntax means.  You are asking GCC to put a register
name in there, so the result is something like
    ldr r1, =r1
This winds up referring to a symbol named r1, rather than the register r1.

Ian

Re: Thumb inline assembly

[Kalai Rajah N]

Thanks. Changing that line works. I had this code working in the
function directly as I was passing immediates. When this is called
through a function, it takes registers and I had to update it
accordingly.


On Mon, Jun 10, 2013 at 6:01 PM, Ian Lance Taylor <iant@google.com> wrote:
> On Mon, Jun 10, 2013 at 5:41 PM, Kalai Rajah N <kalairajah@gmail.com> wrote:
>
>> "ldr r1, =%0 /* load the nvic_iser* register */ \n\t"
>
> The references are coming from your lines like the above.  I don't
> know what this syntax means.  You are asking GCC to put a register
> name in there, so the result is something like
>     ldr r1, =r1
> This winds up referring to a symbol named r1, rather than the register r1.
>
> Ian