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From: Xi Ruoyao <xry111@mengyan1223.wang>
To: vincent Dupaquis <v.dupaquis@trusted-objects.com>, gcc-help@gcc.gnu.org
Subject: Re: Question related to -fPIC behaviour across architectures
Date: Tue, 03 May 2022 18:24:40 +0800	[thread overview]
Message-ID: <a105b44634b723b9990a811948f6bc4d2ce528dc.camel@mengyan1223.wang> (raw)
In-Reply-To: <7038357f-02af-0bcd-f156-73851c3227b3@trusted-objects.com>

On Tue, 2022-05-03 at 10:26 +0200, vincent Dupaquis wrote:


> - Is there somewhere a common definition of what mean PIC for the 
> different architectures ?

Generally -fpic/-fPIC does not means only position-independant code, but
position-independant code **suitable for dynamic linking**.

Consider the code:

void callee(void)
{
  /* ... */
}

void caller(void)
{
  callee();
}

Without -fPIC caller may call callee with a PC-relative call
instruction.  But with -fPIC it's not allowed because the symbol callee
may be interposed.  For more info:
https://maskray.me/blog/2021-05-16-elf-interposition-and-bsymbolic

(You may argue that the ELF interposition rule is strange and known to
slow down programs, but there are still many programs depending on the
rule in 2022.)

So my guess is w/o -fPIC the compiler just calls callee with a PC-rel
call, but with -fPIC it needs to either:

(1) Load the address of callee from GOT.

or

(2) Call the PLT stub ("callee@PLT") which is resolved to "jump callee"
at runtime.

For (1), the address of the callee is loaded into a register then a
"call register" instruction is used.  It seems callx8 is such an
instruction on Xtensa (I know nothing about Xtensa so it's from Google).
For (2), the compiler and the assembler cannot determine if the PLT stub
is out-of-range for the PC-rel call instruction (as the PLT stubs are
generated by the linker).  So the only approach legal for the worst case
is to assume the PLT stub may be far away from the call site.  Then a
PC-relative address load instruction will be used to load the address of
the PLT stub into a register, then callx8 is used to perform the call.


For some of other targets, a code model is defined to guarantee the PLT
stubs to be in-range of the PC-rel call instruction.  Those targets can
simply use PC-rel call to invoke callee@PLT.  But again I know nothing
about Xtensa and I can't reproduce the behavior you mentioned with GCC
trunk.  It seems always generating "l32r/callx8" pairs for calls on
xtensa-linux-gnu, unless the callee is `static`.  And it makes sense to
me: "l32r", as a PC-relative address loading instruction, will load the
address of callee@PLT correctly.
-- 
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University

  reply	other threads:[~2022-05-03 10:24 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-14 22:43 Compile GCC using only tools isolated from host environment Benjamin Lovy
2022-03-15  7:19 ` Xi Ruoyao
2022-03-16 16:06   ` Benjamin Lovy
2022-03-15  8:46 ` Jonathan Wakely
2022-05-03  8:26 ` Question related to -fPIC behaviour across architectures vincent Dupaquis
2022-05-03 10:24   ` Xi Ruoyao [this message]
2022-05-03 13:29     ` vincent Dupaquis
2022-05-03 14:29   ` Florian Weimer
2022-05-03 15:45     ` vincent Dupaquis

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