* Stack allocation on amd64
@ 2018-03-09 10:28 Mason
2018-03-09 11:39 ` Florian Weimer
0 siblings, 1 reply; 4+ messages in thread
From: Mason @ 2018-03-09 10:28 UTC (permalink / raw)
To: GCC help
Hello,
Consider the following program:
void toto(int *tab);
void foo1(void)
{
int tab[N];
toto(tab);
}
I checked how much space gcc allocates on the stack for various values of N:
for ((N=1; N<=12; ++N)); do
echo -n N = $N
gcc-7 -O3 -march=haswell -Wall -S -fno-stack-protector -D N=$N alloc.c
grep 'subq' alloc.s
done
N = 1 subq $24, %rsp
N = 2 subq $24, %rsp
N = 3 subq $24, %rsp
N = 4 subq $24, %rsp
N = 5 subq $40, %rsp
N = 6 subq $40, %rsp
N = 7 subq $40, %rsp
N = 8 subq $40, %rsp
N = 9 subq $56, %rsp
N = 10 subq $56, %rsp
N = 11 subq $56, %rsp
N = 12 subq $56, %rsp
The call instruction will push the return address (8 bytes)
on the stack, therefore gcc is allocating
{1,2,3,4} = 24 + 8 = 32
{5,6,7,8} = 40 + 8 = 48
{9,10,11,12} = 56 + 8 = 64
16-byte alignment, because SIMD, right?
However, it seems gcc could allocate less in some cases:
{1,2} = 8 + 8 = 16
{3,4,5,6} = 24 + 8 = 32
{7,8,9,10} = 40 + 8 = 48
What am I missing?
For example, why is gcc allocating 40 bytes for N=5 and N=6?
Hmmm... reading up on https://wiki.osdev.org/System_V_ABI I see that
"The stack is 16-byte aligned just before the call instruction is called."
IIUC, it's the callee's responsibility to align the stack.
I suppose that doesn't change the reasoning above, though.
Regards.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Stack allocation on amd64
2018-03-09 10:28 Stack allocation on amd64 Mason
@ 2018-03-09 11:39 ` Florian Weimer
2018-03-09 11:57 ` Mason
0 siblings, 1 reply; 4+ messages in thread
From: Florian Weimer @ 2018-03-09 11:39 UTC (permalink / raw)
To: Mason, GCC help
On 03/09/2018 11:28 AM, Mason wrote:
> IIUC, it's the callee's responsibility to align the stack.
On GNU, the caller has to provide 16-byte alignment. Beyond that, the
callee has to do its own thing, but it can (and will) assume 16 byte
alignment (i.e., %rsp + 8 is a multiple of 16).
Thanks,
Florian
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Stack allocation on amd64
2018-03-09 11:39 ` Florian Weimer
@ 2018-03-09 11:57 ` Mason
2018-03-09 12:31 ` Florian Weimer
0 siblings, 1 reply; 4+ messages in thread
From: Mason @ 2018-03-09 11:57 UTC (permalink / raw)
To: Florian Weimer; +Cc: GCC help
On 09/03/2018 12:39, Florian Weimer wrote:
> On 03/09/2018 11:28 AM, Mason wrote:
>
>> IIUC, it's the callee's responsibility to align the stack.
>
> On GNU, the caller has to provide 16-byte alignment. Beyond that, the
> callee has to do its own thing, but it can (and will) assume 16 byte
> alignment (i.e., %rsp + 8 is a multiple of 16).
Thanks for clearing that up.
The main question remains: why is gcc allocating e.g. 24 bytes
for an 8-byte array? (N=2) 8 bytes are enough AFAICT.
Regards.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Stack allocation on amd64
2018-03-09 11:57 ` Mason
@ 2018-03-09 12:31 ` Florian Weimer
0 siblings, 0 replies; 4+ messages in thread
From: Florian Weimer @ 2018-03-09 12:31 UTC (permalink / raw)
To: Mason; +Cc: GCC help
On 03/09/2018 12:57 PM, Mason wrote:
> The main question remains: why is gcc allocating e.g. 24 bytes
> for an 8-byte array? (N=2) 8 bytes are enough AFAICT.
There is some discussion regarding this matter in this bug report:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57908
I find the ABI requirement and the current compiler behavior a bit
puzzling, and it seems that we don't reduce alignment for small arrays
on the stack with -Os, as suggested in the report.
Thanks,
Florian
^ permalink raw reply [flat|nested] 4+ messages in thread
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