From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16795 invoked by alias); 14 Nov 2006 18:23:30 -0000 Received: (qmail 16482 invoked by uid 22791); 14 Nov 2006 18:23:28 -0000 X-Spam-Check-By: sourceware.org Received: from smtp-out.google.com (HELO smtp-out.google.com) (216.239.45.12) by sourceware.org (qpsmtpd/0.31) with ESMTP; Tue, 14 Nov 2006 18:23:19 +0000 Received: from zps77.corp.google.com (zps77.corp.google.com [172.25.146.77]) by smtp-out.google.com with ESMTP id kAEIN9hY028582; Tue, 14 Nov 2006 10:23:09 -0800 Received: from localhost.localdomain.google.com (dhcp-172-18-118-195.corp.google.com [172.18.118.195]) (authenticated bits=0) by zps77.corp.google.com with ESMTP id kAEIMu4T025039 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 14 Nov 2006 10:22:56 -0800 To: Nikolaos Kavvadias Cc: gcc-help@gcc.gnu.org Subject: Re: Extracting information from GCC register allocation References: <1163450950.10266.ezmlm@gcc.gnu.org> <4559DD3C.9010704@physics.auth.gr> From: Ian Lance Taylor Date: Tue, 14 Nov 2006 18:23:00 -0000 In-Reply-To: <4559DD3C.9010704@physics.auth.gr> Message-ID: User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.4 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-IsSubscribed: yes Mailing-List: contact gcc-help-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-help-owner@gcc.gnu.org X-SW-Source: 2006-11/txt/msg00194.txt.bz2 Nikolaos Kavvadias writes: > 1. Is it possible to emit something close to assembly with > pseudo-registers instead of registers? I mean, is it possible to do this > just before each one of these passes? Or would it be possible to > devise such pass (e.g. an emitter just prior greg). I can see some RTL > stuff with pseudos (e.g. *.lreg) but is it semantically complete in > order to be possible to translate it to assembly (even though with > infinite registers)? Yes. > 2. Is it possible to explicitly mark the fill/spill instructions (or > RTL statements) in such RTL dumps? It would take a bit of work in reload, but, yes, it is possible. > 3. Supposedly a description is devised that has a > ridiculously large of registers (so that spills *almost* never will > occur). > Will this approach the effect of register allocation for infinite > registers or there exist other GCC-specific constraints. What are the > limits in the number of registers, registers in classes, allocable > registers etc (i've seen some very bad restrictions in LCC due to the > use of masks with host-dependent size). There are no gcc constraints of this form, up to having a few million hard registers. Implementing a very large number of hard registers will tend to slow the compiler down, as there are a number of arrays and bitmaps which are sized to the number of registers. > 4. There is some discussion around gmp/mpfr support in GCC lately. Are > we close to using arbitrary-size integers throught the GCC > infrastructure? No, not at all. That would be very slow and would bring little benefit. Ian