Re: Inline assembly constraints question

[Ian Lance Taylor <iant@google.com>]

Jeroen Demeyer <jdemeyer@cage.ugent.be> writes:

> I have a C++ program (i386 target) which has a piece of inline
> assembly with the following constraints:
>
> asm(/* Some asm code */
>     : "=&rm" (n0), "=&r" (n1), "=&r" (n2)
>     : "2" (n0), "1" (n1), "g" (n2), "cI" (s)
> );
>
> When compiled with g++ 4.1.2 (CXXFLAGS=-O2 -march=pentium4) the
> operands %0 and %5 get the same memory address, even though they refer
> to distinct variables (n0 and n2).  So, is this a bug in g++ 4.1.2 or
> am I doing something wrong?   g++ 3.4.6 and g++ 4.3.1 generate correct
> code, but that does not really prove anything.

It would help to see the types of the variables.  Is n2 a pointer?
Also it would help to see the actual values that wind up getting
passed in.

With "=%rm" you are telling gcc that it is OK to pass a memory
address.  And "g" accepts any operand.  That gives gcc a lot of
flexibility.  If it does wind up passing in a memory operand for both,
though, it seems to me that they should not overlap.

I think more details would help.  For example, run gcc with the -dg
option, look at FILENAME.xxx.greg, and show us the insn corresponding
to the asm statement.


> In particular I would like to know:
> 1) Is it allowed to put matching (digit) constraints referring to
> different variables?  This is what I do with %2.  The same register is
> used as input for  variable n0 and as output for variable n2.

Yes, that is fine.

> 2) Is there a way to specify some kind of 'earlyclobber' (&) modifier
> with a memory constraint?  How can I prevent gcc from putting an input
> variable and an unrelated output variable in the same memory location?

The simple way is to force one or both of them into registers.

Ian