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* Target Macro for scaling addresses
@ 2011-12-27  9:17 Ayonam Ray
  2011-12-28  3:57 ` Ian Lance Taylor
  0 siblings, 1 reply; 4+ messages in thread
From: Ayonam Ray @ 2011-12-27  9:17 UTC (permalink / raw)
  To: gcc-help

Hi,

I'm looking for a target macro or a hook by which I can tell the
optimizer that in Base + Index addressing, my hardware scales the
Index register by the size of the data being accessed and hence the
Index register increments (for subsequent accesses) should be by 1 and
not by the size of the data being accessed.

Is there something like that or do we have to do something different
in the legitimize_address target hook?

Thanks and regards
Ayonam

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Target Macro for scaling addresses
  2011-12-27  9:17 Target Macro for scaling addresses Ayonam Ray
@ 2011-12-28  3:57 ` Ian Lance Taylor
  2011-12-29  7:11   ` Ayonam Ray
  0 siblings, 1 reply; 4+ messages in thread
From: Ian Lance Taylor @ 2011-12-28  3:57 UTC (permalink / raw)
  To: Ayonam Ray; +Cc: gcc-help

Ayonam Ray <ayonam@gmail.com> writes:

> I'm looking for a target macro or a hook by which I can tell the
> optimizer that in Base + Index addressing, my hardware scales the
> Index register by the size of the data being accessed and hence the
> Index register increments (for subsequent accesses) should be by 1 and
> not by the size of the data being accessed.
>
> Is there something like that or do we have to do something different
> in the legitimize_address target hook?

This is a fairly common addressing mode supported by a number of
processors.  For a scale factor you should represent the address as
    (plus (reg base) (mult (reg index) (const_int scale)))
Make sure that your TARGET_LEGITIMATE_ADDRESS_P hook recognizes that
sort of address, with the appropriate scale factor depending on the
mode.  You shouldn't need to do much else.

Ian

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Target Macro for scaling addresses
  2011-12-28  3:57 ` Ian Lance Taylor
@ 2011-12-29  7:11   ` Ayonam Ray
  2011-12-29 12:22     ` Ian Lance Taylor
  0 siblings, 1 reply; 4+ messages in thread
From: Ayonam Ray @ 2011-12-29  7:11 UTC (permalink / raw)
  To: Ian Lance Taylor; +Cc: gcc-help

On 27 December 2011 20:53, Ian Lance Taylor <iant@google.com> wrote:
> Ayonam Ray <ayonam@gmail.com> writes:
>
>> I'm looking for a target macro or a hook by which I can tell the
>> optimizer that in Base + Index addressing, my hardware scales the
>> Index register by the size of the data being accessed and hence the
>> Index register increments (for subsequent accesses) should be by 1 and
>> not by the size of the data being accessed.
>>
>> Is there something like that or do we have to do something different
>> in the legitimize_address target hook?
>
> This is a fairly common addressing mode supported by a number of
> processors.  For a scale factor you should represent the address as
>    (plus (reg base) (mult (reg index) (const_int scale)))
> Make sure that your TARGET_LEGITIMATE_ADDRESS_P hook recognizes that
> sort of address, with the appropriate scale factor depending on the
> mode.  You shouldn't need to do much else.
>
> Ian

Ian,

Thanks for the suggestion.  I already had something similar in the
TARGET_LEGITIMATE_ADDRESS_P but later realized that I was also
accepting (plus (reg base) (reg index)) as a valid address and that
was the problem.  I removed that and now it works.  However, I now
find that while it is generating correct addressing, it no longer uses
the base+index addressing.  It instead multiplies the loop end
condition by 4, increments the loop counter by 4 and then computes the
base+index(which has now become an offset in a register) first and
then uses a base+offset addressing with offset set to zero.  Any
suggestions to where I might be going wrong?

By using a base+index addressing, it can save one instruction.

Thanks and regards
Ayonam

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Target Macro for scaling addresses
  2011-12-29  7:11   ` Ayonam Ray
@ 2011-12-29 12:22     ` Ian Lance Taylor
  0 siblings, 0 replies; 4+ messages in thread
From: Ian Lance Taylor @ 2011-12-29 12:22 UTC (permalink / raw)
  To: Ayonam Ray; +Cc: gcc-help

Ayonam Ray <ayonam@gmail.com> writes:

> On 27 December 2011 20:53, Ian Lance Taylor <iant@google.com> wrote:
>> Ayonam Ray <ayonam@gmail.com> writes:
>>
>>> I'm looking for a target macro or a hook by which I can tell the
>>> optimizer that in Base + Index addressing, my hardware scales the
>>> Index register by the size of the data being accessed and hence the
>>> Index register increments (for subsequent accesses) should be by 1 and
>>> not by the size of the data being accessed.
>>>
>>> Is there something like that or do we have to do something different
>>> in the legitimize_address target hook?
>>
>> This is a fairly common addressing mode supported by a number of
>> processors.  For a scale factor you should represent the address as
>>    (plus (reg base) (mult (reg index) (const_int scale)))
>> Make sure that your TARGET_LEGITIMATE_ADDRESS_P hook recognizes that
>> sort of address, with the appropriate scale factor depending on the
>> mode.  You shouldn't need to do much else.
>
> Thanks for the suggestion.  I already had something similar in the
> TARGET_LEGITIMATE_ADDRESS_P but later realized that I was also
> accepting (plus (reg base) (reg index)) as a valid address and that
> was the problem.  I removed that and now it works.  However, I now
> find that while it is generating correct addressing, it no longer uses
> the base+index addressing.  It instead multiplies the loop end
> condition by 4, increments the loop counter by 4 and then computes the
> base+index(which has now become an offset in a register) first and
> then uses a base+offset addressing with offset set to zero.  Any
> suggestions to where I might be going wrong?

Look at the dump file of the combine pass to see why it is not combining
the multiplication into the address.

Make sure your TARGET_RTX_COSTS reflects the fact that the
multiplication is free when used in an address.

Ian

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2011-12-29  7:11 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2011-12-27  9:17 Target Macro for scaling addresses Ayonam Ray
2011-12-28  3:57 ` Ian Lance Taylor
2011-12-29  7:11   ` Ayonam Ray
2011-12-29 12:22     ` Ian Lance Taylor

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