From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15331 invoked by alias); 22 Apr 2004 17:57:32 -0000 Mailing-List: contact gcc-help-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-help-owner@gcc.gnu.org Received: (qmail 15099 invoked from network); 22 Apr 2004 17:57:26 -0000 Received: from unknown (HELO hawaii.kealia.com) (209.3.10.89) by sources.redhat.com with SMTP; 22 Apr 2004 17:57:26 -0000 Received: by hawaii.kealia.com (Postfix, from userid 2049) id 3678DCDFB; Thu, 22 Apr 2004 10:57:58 -0700 (PDT) To: gcc-help Subject: atomic asms and GCC 3.4.0 From: David Carlton Date: Thu, 22 Apr 2004 17:57:00 -0000 Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2004-04/txt/msg00297.txt.bz2 I'm trying to get some code of ours to work with GCC 3.4.0, and I'm running into some problems with some asms we use for atomic operations. (These were originally taken from a header originally written by Doug Rabson, for what it's worth.) The macros originally said: #define MPLOCKED "lock ; " /* * The assembly is volatilized to demark potential before-and-after side * effects if an interrupt or SMP collision were to occur. */ #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ static inline __attribute__((__always_inline__)) void \ atomic_##NAME##_##TYPE(volatile unsigned TYPE *p, unsigned TYPE v)\ { \ __asm __volatile(MPLOCKED OP \ : "+m" (*p) \ : CONS (V)); \ } ATOMIC_ASM(set, long, "orl %1,%0", "ir", v); ATOMIC_ASM(clear, long, "andl %1,%0", "ir", ~v); ATOMIC_ASM(add, long, "addl %1,%0", "ir", v); ATOMIC_ASM(subtract, long, "subl %1,%0", "ir", v); With GCC 3.4.0, I got a complaint about a read-write operation whose constraint doesn't allow a non-register. (I don't have the exact error message written down, though I can regenerate it easily enough if that would be helpful.) I've never written asm expressions myself, so I'm swimming in the dark here to some extent, but looking at the info pages made it seem like the "+m" was the problem, and the following alternative (which I also found in a web search) seemed reasonable: #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ static inline __attribute__((__always_inline__)) void \ atomic_##NAME##_##TYPE(volatile unsigned TYPE *p, unsigned TYPE v)\ { \ __asm __volatile(MPLOCKED OP \ : "=m" (*p) \ : "0" (*p), CONS (V)); \ } ATOMIC_ASM(set, long, "orl %2,%0", "ir", v); ATOMIC_ASM(clear, long, "andl %2,%0", "ir", ~v); ATOMIC_ASM(add, long, "addl %2,%0", "ir", v); ATOMIC_ASM(subtract, long, "subl %2,%0", "ir", v); In other words, I split the "+m" into two separate operands, with the second refering to the first via "0", and changed the %1's into %2's: so what used to be __asm __volatile( "lock; addl %1,%0" : "+m" (*p) : "ir" (v) ); becomes __asm __volatile( "lock; addl %2,%0" : "=m" (*p) : "0" (*p), "ir" (v) ); This time, however, I get the following message: Atomic.h:112: warning: matching constraint does not allow a register Atomic.h:112: warning: matching constraint does not allow a register Atomic.h:112: error: inconsistent operand constraints in an `asm' (Where line 112 is the ATOMIC_ASM(add) line.) So obviously I did something wrong, but I'm not sure what, and I can't really make head or tails of that error message. Can anbody more familiar with GCC 3.4 and asms help me? I don't subscribe to gcc-help, so please Cc: me on any answers. Thanks, David Carlton carlton@kealia.com