[AVR] [COMMITTED] New predicates.

[AVR] [COMMITTED] New predicates.

[Anatoly Sokolov]

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Hi,

The patch contains some cleanups for the AVR target:

 * move 'call_insn_operand' predicate from 'avr.c' file to 'predicates.md'.

 * in *push<mode> insns use 'reg_or_0_operand' predicate instead the condition 
 and REG_SP constraint instead magic number 32.

No new regresion in GCC testsuite.

2007-01-07  Anatoly Sokolov <aesok@post.ru>

	* config/avr/avr-protos.h (call_insn_operand): Delete prototype.
	* config/avr/avr.c (call_insn_operand): Delete function.
	* config/avr/avr.md (*pushqi, *pushhi, *pushsi, *pushsf): Use REG_SP
	instead of register number. Use predicates.
	* config/avr/predicates.md (const0_operand, reg_or_0_operand, 
	call_insn_operand): Add.

Anatoly.

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Index: gcc/config/avr/avr-protos.h
===================================================================
--- gcc/config/avr/avr-protos.h	(revision 120383)
+++ gcc/config/avr/avr-protos.h	(working copy)
@@ -112,7 +112,6 @@
 extern int jump_over_one_insn_p (rtx insn, rtx dest);
 
 extern int avr_hard_regno_mode_ok (int regno, enum machine_mode mode);
-extern int call_insn_operand (rtx op, enum machine_mode mode);
 extern void final_prescan_insn (rtx insn, rtx *operand, int num_operands);
 extern int avr_simplify_comparison_p (enum machine_mode mode,
 				      RTX_CODE operator, rtx x);
Index: gcc/config/avr/predicates.md
===================================================================
--- gcc/config/avr/predicates.md	(revision 120383)
+++ gcc/config/avr/predicates.md	(working copy)
@@ -50,7 +50,17 @@
   (and (match_code "const_int")
        (match_test "INTVAL (op) >= 0x40 
                     && INTVAL (op) <= 0x60 - GET_MODE_SIZE (mode)")))
-       
+
+;; Return 1 if OP is the zero constant for MODE.
+(define_predicate "const0_operand"
+  (and (match_code "const_int,const_double")
+       (match_test "op == CONST0_RTX (mode)")))
+
+;; Returns true if OP is either the constant zero or a register.
+(define_predicate "reg_or_0_operand"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "const0_operand")))
+
 ;; Returns 1 if OP is a SYMBOL_REF.
 (define_predicate "symbol_ref_operand"
   (match_code "symbol_ref"))
@@ -83,3 +93,9 @@
 (define_predicate "simple_comparison_operator"
   (and (match_operand 0 "comparison_operator")
        (not (match_code "gt,gtu,le,leu"))))
+
+;; Return true if OP is a valid call operand.
+(define_predicate "call_insn_operand"
+  (and (match_code "mem")
+       (ior (match_test "register_operand (XEXP (op, 0), mode)")
+            (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))"))))
Index: gcc/config/avr/avr.md
===================================================================
--- gcc/config/avr/avr.md	(revision 120383)
+++ gcc/config/avr/avr.md	(working copy)
@@ -145,9 +145,9 @@
   [(set_attr "length" "5")])
 
 (define_insn "*pushqi"
-  [(set (mem:QI (post_dec (reg:HI 32)))
-        (match_operand:QI 0 "nonmemory_operand" "r,L"))]
-  "(operands[0] == const0_rtx || register_operand (operands[0], QImode))"
+  [(set (mem:QI (post_dec (reg:HI REG_SP)))
+        (match_operand:QI 0 "reg_or_0_operand" "r,L"))]
+  ""
   "@
 	push %0
 	push __zero_reg__"
@@ -155,25 +155,25 @@
 
 
 (define_insn "*pushhi"
-  [(set (mem:HI (post_dec (reg:HI 32)))
-        (match_operand:HI 0 "nonmemory_operand" "r,L"))]
-  "(operands[0] == const0_rtx || register_operand (operands[0], HImode))"
+  [(set (mem:HI (post_dec (reg:HI REG_SP)))
+        (match_operand:HI 0 "reg_or_0_operand" "r,L"))]
+  ""
   "@
 	push %B0\;push %A0
 	push __zero_reg__\;push __zero_reg__"
   [(set_attr "length" "2,2")])
 
 (define_insn "*pushsi"
-  [(set (mem:SI (post_dec (reg:HI 32)))
-        (match_operand:SI 0 "nonmemory_operand" "r,L"))]
-  "(operands[0] == const0_rtx || register_operand (operands[0], SImode))"
+  [(set (mem:SI (post_dec (reg:HI REG_SP)))
+        (match_operand:SI 0 "reg_or_0_operand" "r,L"))]
+  ""
   "@
 	push %D0\;push %C0\;push %B0\;push %A0
 	push __zero_reg__\;push __zero_reg__\;push __zero_reg__\;push __zero_reg__"
   [(set_attr "length" "4,4")])
 
 (define_insn "*pushsf"
-  [(set (mem:SF (post_dec (reg:HI 32)))
+  [(set (mem:SF (post_dec (reg:HI REG_SP)))
         (match_operand:SF 0 "register_operand" "r"))]
   ""
   "push %D0
Index: gcc/config/avr/avr.c
===================================================================
--- gcc/config/avr/avr.c	(revision 120383)
+++ gcc/config/avr/avr.c	(working copy)
@@ -1170,22 +1170,6 @@
     print_operand_address (file, x);
 }
 
-/* Recognize operand OP of mode MODE used in call instructions.  */
-
-int
-call_insn_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
-  if (GET_CODE (op) == MEM)
-    {
-      rtx inside = XEXP (op, 0);
-      if (register_operand (inside, Pmode))
-        return 1;
-      if (CONSTANT_ADDRESS_P (inside))
-        return 1;
-    }
-  return 0;
-}
-
 /* Update the condition code in the INSN.  */
 
 void