RE: Re: [Patch] New: CR16 port

["Pompapathi V Gadad" <pompapathi@gmail.com>]

...
> > Rask Ingemann Lambertsen wrote:
> 
> > >>+(define_insn "mov<mode>_regs"
> [4 mov patterns in total]
> > >
> > >These would normally be one pattern with five alternatives. A reg->reg
> > >copy can turn into a reg->mem copy during reload, for example.
> > >
...
>    You could define "LONG" to expand to SI and SF and use something like
> this:
> 
> (define_insn "*mov<mode>"
>   [(set (match_operand:LONG 0 "nonimmediate_operand"	"=r, r, r,m")
> 	(match_operand:LONG 1 "general_operand"		"r,<iF>,m,r"))]
>   "register_operand (operands[0], <MODE>mode)
>    || register_operand (operands[1], <MODE>mode)"
>   "@
>    mov<tIsa>\t%1, %0
>    mov<tIsa>\t%1, %0
>    load<tIsa>\t%1, %0
>    stor<tIsa>\t%1, %0"
>   [(set_attr "length" "2,<lImmArith>,<lImmArith>,<lImmArith>")]
> )
> 
> (define_insn "*mov<mode>"
>   [(set (match_operand:SHORT 0 "nonimmediate_operand"	"=r, r, r,m, m")
> 	(match_operand:SHORT 1 "general_operand"	"r,<iF>,m,r,<LL>"))]
>   "!store_operand (operands[0], <MODE>mode)
>    || register_operand (operands[1], <MODE>mode)
>    || u4bits_operand (operands[1], <MODE>mode)"
>   "@
>    mov<tIsa>\t%1, %0
>    mov<tIsa>\t%1, %0
>    load<tIsa>\t%1, %0
>    stor<tIsa>\t%1, %0
>    stor<tIsaShort>\t%1, %0"
>   [(set_attr "length"
> "2,<lImmArith>,<lImmArith>,<lImmArith>,<lImmShort>")]
> )
> 
>    You may have to adjust the predicates a little.


Yes. I will experiment on these lines and let you know the results as soon
as possible. 

--
Pompa