From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18357 invoked by alias); 14 Nov 2013 08:23:52 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 18348 invoked by uid 89); 14 Nov 2013 08:23:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=2.1 required=5.0 tests=AWL,BAYES_99,KAM_STOCKGEN,RDNS_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: service87.mimecast.com Received: from Unknown (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 14 Nov 2013 08:23:50 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 14 Nov 2013 08:23:42 +0000 Received: from E103005 ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 14 Nov 2013 08:23:38 +0000 From: "Joey Ye" To: "Richard Earnshaw" Cc: Subject: RE: [patch] [arm] New option for PIC offset unfixed Date: Thu, 14 Nov 2013 10:09:00 -0000 Message-ID: <000001cee112$c9f683c0$5de38b40$@arm.com> MIME-Version: 1.0 X-MC-Unique: 113111408234200901 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0001_01CEE155.D84A97C0" X-SW-Source: 2013-11/txt/msg01568.txt.bz2 This is a multipart message in MIME format. ------=_NextPart_000_0001_01CEE155.D84A97C0 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-length: 666 > -----Original Message----- > From: Richard Earnshaw > Sent: Thursday, November 14, 2013 0:57 > To: Joey Ye > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [patch] [arm] New option for PIC offset unfixed >=20 > > So you are suggesting change like this: > > + Target Report Var(arm_pic_data_is_text_relative) Init(-1) > > > > + if (arm_pic_data_is_text_relative < 0 && TARGET_VXWORKS_RTP) > > + arm_pic_data_is_text_relative =3D 0; > > + else > > + arm_pic_data_is_text_relative =3D 1; > > >=20 > No, use the global_options_set structure to find out if the user has set the > value. Thank pointing this out. Here is the latest patch with global_options_set ------=_NextPart_000_0001_01CEE155.D84A97C0 Content-Type: text/plain; name=pic_data_text_rel-1114.patch.txt Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="pic_data_text_rel-1114.patch.txt" Content-length: 2930 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 7757e86..3af8293 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2504,6 +2504,10 @@ arm_option_override (void) arm_pic_register =3D pic_register; } =20 + if (TARGET_VXWORKS_RTP + && !global_options_set.x_arm_pic_data_is_text_relative) + arm_pic_data_is_text_relative =3D 0; + /* Enable -mfix-cortex-m3-ldrd by default for Cortex-M3 cores. */ if (fix_cm3_ldrd =3D=3D 2) { @@ -6020,7 +6024,7 @@ legitimize_pic_address (rtx orig, enum machine_mode m= ode, rtx reg) || (GET_CODE (orig) =3D=3D SYMBOL_REF && SYMBOL_REF_LOCAL_P (orig))) && NEED_GOT_RELOC - && !TARGET_VXWORKS_RTP) + && arm_pic_data_is_text_relative) insn =3D arm_pic_static_addr (orig, reg); else { @@ -21498,7 +21502,7 @@ arm_assemble_integer (rtx x, unsigned int size, int= aligned_p) { /* See legitimize_pic_address for an explanation of the TARGET_VXWORKS_RTP check. */ - if (TARGET_VXWORKS_RTP + if (!arm_pic_data_is_text_relative || (GET_CODE (x) =3D=3D SYMBOL_REF && !SYMBOL_REF_LOCAL_P (x))) fputs ("(GOT)", asm_out_file); else diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 1781b75..dbd841e 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -568,6 +568,10 @@ extern int prefer_neon_for_64bits; #define NEED_PLT_RELOC 0 #endif =20 +#ifndef TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE +#define TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE 1 +#endif + /* Nonzero if we need to refer to the GOT with a PC-relative offset. In other words, generate =20 diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 9b74038..fa0839a 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -158,6 +158,10 @@ mlong-calls Target Report Mask(LONG_CALLS) Generate call insns as indirect calls, if necessary =20 +mpic-data-is-text-relative +Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_D= ATA_IS_TEXT_RELATIVE) +Assume data segments are relative to text segment. + mpic-register=3D Target RejectNegative Joined Var(arm_pic_register_string) Specify the register to be used for PIC addressing diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 863e518..fbe77e6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12120,6 +12120,12 @@ before execution begins. Specify the register to be used for PIC addressing. The default is R10 unless stack-checking is enabled, when R9 is used. =20 +@item -mpic-data-is-text-relative +@opindex mpic-data-is-text-relative +Assume that each data segments are relative to text segment at load time. +Therefore, it permits addressing data using PC-relative operations. +This option is on by default for targets other than VxWorks RTP. + @item -mpoke-function-name @opindex mpoke-function-name Write the name of each function into the text section, directly ------=_NextPart_000_0001_01CEE155.D84A97C0--