From: Marat Zakirov <m.zakirov@samsung.com>
To: gcc-patches@gcc.gnu.org
Cc: 'Ramana Radhakrishnan' <ramana.radhakrishnan@arm.com>,
'Richard Earnshaw' <Richard.Earnshaw@arm.com>,
'Kyrill Tkachov' <kyrylo.tkachov@arm.com>,
'Slava Garbuzov' <v.garbuzov@samsung.com>,
tetra2005@gmail.com, 'Marat Zakirov' <marat61@gmail.com>
Subject: [PATCH] Fix for PR 61561
Date: Mon, 23 Jun 2014 11:41:00 -0000 [thread overview]
Message-ID: <000001cf8ed7$f53e3000$dfba9000$@samsung.com> (raw)
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Hi all,
Here's my new patch for PR 61561
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61561).
Which fixes ICE appeared due to QI/HI pattern lack in arm.md for stack
pointer register.
Reg. tested on arm-v7.
--Marat
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gcc/ChangeLog:
2014-06-20 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
(*movhi_bytes): Likewise.
(*arm_movqi_insn): Likewise.
gcc/testsuite/ChangeLog:
2014-06-20 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* gcc.dg/pr61561.c: New test.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 42c12c8..99290dc 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -6291,7 +6291,7 @@
;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
- (match_operand:HI 1 "general_operand" "rI,K,r,mi"))]
+ (match_operand:HI 1 "general_operand" "rIk,K,r,mi"))]
"TARGET_ARM
&& arm_arch4
&& (register_operand (operands[0], HImode)
@@ -6315,7 +6315,7 @@
(define_insn "*movhi_bytes"
[(set (match_operand:HI 0 "s_register_operand" "=r,r,r")
- (match_operand:HI 1 "arm_rhs_operand" "I,r,K"))]
+ (match_operand:HI 1 "arm_rhs_operand" "I,rk,K"))]
"TARGET_ARM"
"@
mov%?\\t%0, %1\\t%@ movhi
@@ -6430,7 +6430,7 @@
(define_insn "*arm_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m")
- (match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))]
+ (match_operand:QI 1 "general_operand" "rk,rk,I,Py,K,Uu,l,m,r"))]
"TARGET_32BIT
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/testsuite/gcc.dg/pr61561.c b/gcc/testsuite/gcc.dg/pr61561.c
new file mode 100644
index 0000000..0f4b716
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr61561.c
@@ -0,0 +1,15 @@
+/* PR c/61561. */
+/* { dg-do assemble } */
+/* { dg-options " -w -O2" } */
+
+int dummy (int a);
+
+char a;
+short b;
+
+void mmm (void)
+{
+ char dyn[dummy (3)];
+ a = (char)&dyn[0];
+ b = (short)&dyn[0];
+}
next reply other threads:[~2014-06-23 11:41 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-23 11:41 Marat Zakirov [this message]
-- strict thread matches above, loose matches on Subject: below --
2014-06-19 15:06 Marat Zakirov
2014-06-19 15:13 ` Kyrill Tkachov
2014-06-19 15:46 ` Yuri Gribov
2014-06-19 16:30 ` Ramana Radhakrishnan
2014-06-19 15:47 ` Richard Earnshaw
2014-06-19 20:19 ` Yuri Gribov
2014-07-10 13:07 ` Ramana Radhakrishnan
2014-07-11 15:03 ` Richard Earnshaw
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