* [Patch, ARM] Enable GCC to support new ARM core cortex-m0+
@ 2012-04-06 6:15 Terry Guo
2012-04-11 8:26 ` Richard Earnshaw
0 siblings, 1 reply; 3+ messages in thread
From: Terry Guo @ 2012-04-06 6:15 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 471 bytes --]
Hello,
This simple patch is to enable GCC to accept new option -mcpu=cortex-m0plus
in order to support newly released Cortex-M0+. Is it OK to trunk, 4.7 branch
and 4.6 branch?
BR,
Terry
2012-04-06 Terry Guo <terry.guo@arm.com>
* config/arm/arm-cores.def: Added core cortex-m0plus.
* config/arm/arm-tune.md: Regenerated.
* config/arm/arm-tables.opt: Regenerated.
* doc/invoke.texi: Added entry for cpu ARM Cortex-M0PLUS.
[-- Attachment #2: gcc-support-cortex-m0plus.txt --]
[-- Type: text/plain, Size: 3272 bytes --]
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 80609e0..d82b10b 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -137,4 +137,4 @@ ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex)
ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex)
ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, cortex)
ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, cortex)
-
+ARM_CORE("cortex-m0plus", cortexm0plus, 6M, FL_LDSCHED, cortex)
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index c0b2437..aa64f9c 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -270,6 +270,9 @@ Enum(processor_type) String(cortex-m1) Value(cortexm1)
EnumValue
Enum(processor_type) String(cortex-m0) Value(cortexm0)
+EnumValue
+Enum(processor_type) String(cortex-m0plus) Value(cortexm0plus)
+
Enum
Name(arm_arch) Type(int)
Known ARM architectures (for use with the -march= option):
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index 54ef0f1..040587a 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from arm-cores.def
(define_attr "tune"
- "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0"
+ "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0,cortexm0plus"
(const (symbol_ref "((enum attr_tune) arm_tune)")))
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 8571a8b..f81a223 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -10668,6 +10668,7 @@ assembly code. Permissible names are: @samp{arm2}, @samp{arm250},
@samp{cortex-m4}, @samp{cortex-m3},
@samp{cortex-m1},
@samp{cortex-m0},
+@samp{cortex-m0plus},
@samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312},
@samp{fa526}, @samp{fa626},
@samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Patch, ARM] Enable GCC to support new ARM core cortex-m0+
2012-04-06 6:15 [Patch, ARM] Enable GCC to support new ARM core cortex-m0+ Terry Guo
@ 2012-04-11 8:26 ` Richard Earnshaw
0 siblings, 0 replies; 3+ messages in thread
From: Richard Earnshaw @ 2012-04-11 8:26 UTC (permalink / raw)
To: Terry Guo; +Cc: gcc-patches
On 06/04/12 07:15, Terry Guo wrote:
> Hello,
>
> This simple patch is to enable GCC to accept new option -mcpu=cortex-m0plus
> in order to support newly released Cortex-M0+. Is it OK to trunk, 4.7 branch
> and 4.6 branch?
>
> BR,
> Terry
>
> 2012-04-06 Terry Guo <terry.guo@arm.com>
>
> * config/arm/arm-cores.def: Added core cortex-m0plus.
> * config/arm/arm-tune.md: Regenerated.
> * config/arm/arm-tables.opt: Regenerated.
> * doc/invoke.texi: Added entry for cpu ARM Cortex-M0PLUS.
>
This is ok for trunk only. It's not suitable for the release branches
as it is a new feature.
R.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Patch, ARM] Enable GCC to support new ARM core cortex-m0+
[not found] <4f7e89ff.45c5b60a.17b4.ffffdda1SMTPIN_ADDED@mx.google.com>
@ 2012-04-11 7:22 ` Terry Guo
0 siblings, 0 replies; 3+ messages in thread
From: Terry Guo @ 2012-04-11 7:22 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches
Ping.
On Fri, Apr 6, 2012 at 2:15 PM, Terry Guo <terry.guo@arm.com> wrote:
> Hello,
>
> This simple patch is to enable GCC to accept new option -mcpu=cortex-m0plus
> in order to support newly released Cortex-M0+. Is it OK to trunk, 4.7 branch
> and 4.6 branch?
>
> BR,
> Terry
>
> 2012-04-06 Terry Guo <terry.guo@arm.com>
>
> * config/arm/arm-cores.def: Added core cortex-m0plus.
> * config/arm/arm-tune.md: Regenerated.
> * config/arm/arm-tables.opt: Regenerated.
> * doc/invoke.texi: Added entry for cpu ARM Cortex-M0PLUS.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2012-04-06 6:15 [Patch, ARM] Enable GCC to support new ARM core cortex-m0+ Terry Guo
2012-04-11 8:26 ` Richard Earnshaw
[not found] <4f7e89ff.45c5b60a.17b4.ffffdda1SMTPIN_ADDED@mx.google.com>
2012-04-11 7:22 ` Terry Guo
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