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From: "Zhenqiang Chen" <zhenqiang.chen@arm.com>
To: "Richard Earnshaw" <Richard.Earnshaw@arm.com>
Cc: "Ramana Radhakrishnan" <Ramana.Radhakrishnan@arm.com>,
	<gcc-patches@gcc.gnu.org>
Subject: RE: [PATCH, testsuite, ARM] Check lr other than r3
Date: Wed, 12 Nov 2014 08:25:00 -0000	[thread overview]
Message-ID: <000101cffe50$9a1e9cd0$ce5bd670$@arm.com> (raw)
In-Reply-To: <545CC031.50400@arm.com>



> -----Original Message-----
> From: Richard Earnshaw
> Sent: Friday, November 07, 2014 8:51 PM
> To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
> Cc: Ramana Radhakrishnan
> Subject: Re: [PATCH, testsuite, ARM] Check lr other than r3
> 
> On 03/11/14 08:18, Zhenqiang Chen wrote:
> > Hi,
> >
> > pr45701-1.c FAIL for all tests. The patch updates it to check lr other
> > than r3, based on the comments in arm_compute_save_reg_mask,
> >
> >   /* ...
> >      Otherwise if we do not use the link register we do not need to save
> >      it.  If we are pushing other registers onto the stack however, we
> >      can save an instruction in the epilogue by pushing the link
register
> >      now and then popping it back into the PC.  This incurs extra memory
> >      accesses though, so we only do it when optimizing for size, and
only
> >      if we know that we will not need a fancy return sequence.  */
> >
> > The updated case PASS for Cortex-M0/M4 and Cortext-A15 (THUMB and
> ARM
> > modes).
> >
> > OK for trunk?
> >
> > Thanks!
> > -Zhenqiang
> >
> > testsuite/ChangeLog:
> > 2014-11-03  Zhenqiang Chen  <zhenqiang.chen@arm.com>
> >
> > 	* gcc.target/arm/pr45701-1.c: Check LR used.
> 
> Have you checked that this doesn't cause regressions on ARMv4T?  I suspect
> the code was originally intended to support targets where interworking was
> not trivial.

Thanks for the comments. ARMV4T also saves LR and can pass with the patch.

In function, thumb1_compute_save_reg_mask, we have code:

/* LR will also be pushed if any lo regs are pushed.  */
  if (mask & 0xff || thumb_force_lr_save ())
    mask |= (1 << LR_REGNUM);

> >
> > diff --git a/gcc/testsuite/gcc.target/arm/pr45701-1.c
> > b/gcc/testsuite/gcc.target/arm/pr45701-1.c
> > index 2c690d5..c087cfc 100644
> > --- a/gcc/testsuite/gcc.target/arm/pr45701-1.c
> > +++ b/gcc/testsuite/gcc.target/arm/pr45701-1.c
> > @@ -1,7 +1,7 @@
> >  /* { dg-do compile } */
> >  /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
> >  /* { dg-options "-mthumb -Os" }  */
> > -/* { dg-final { scan-assembler "push\t\{r3" } } */
> > +/* { dg-final { scan-assembler "lr\}" } } */
> >  /* { dg-final { scan-assembler-not "r8" } } */
> >
> >  extern int hist_verify;
> >
> >
> >
> >
> >
> >




      reply	other threads:[~2014-11-12  8:14 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-03  8:18 Zhenqiang Chen
2014-11-07 12:51 ` Richard Earnshaw
2014-11-12  8:25   ` Zhenqiang Chen [this message]

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