From: "Kyrill Tkachov" <kyrylo.tkachov@arm.com>
To: "Kyrylo Tkachov" <Kyrylo.Tkachov@arm.com>,
"GCC Patches" <gcc-patches@gcc.gnu.org>
Cc: "Ramana Radhakrishnan" <Ramana.Radhakrishnan@arm.com>,
"Richard Earnshaw" <Richard.Earnshaw@arm.com>
Subject: RE: [PATCH][ARM] PR target/64600 Fix another ICE with -mtune=xscale: properly sign-extend mask during constant splitting
Date: Thu, 26 Feb 2015 17:18:00 -0000 [thread overview]
Message-ID: <000101d051e7$e93cde40$bbb69ac0$@arm.com> (raw)
In-Reply-To: <54E4B8B9.6020705@arm.com>
Ping.
Thanks,
Kyrill
> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Kyrill Tkachov
> Sent: 18 February 2015 16:07
> To: GCC Patches
> Cc: Ramana Radhakrishnan; Richard Earnshaw
> Subject: Re: [PATCH][ARM] PR target/64600 Fix another ICE with -
> mtune=xscale: properly sign-extend mask during constant splitting
>
> Ping.
>
> Thanks,
> Kyrill
> On 10/02/15 09:25, Kyrill Tkachov wrote:
> > Ping.
> >
> > https://gcc.gnu.org/ml/gcc-patches/2015-02/msg00141.html
> >
> > Thanks,
> > Kyrill
> >
> > On 03/02/15 15:18, Kyrill Tkachov wrote:
> >> Hi all,
> >>
> >> The ICE in this PR occurs when -mtune=xscale triggers a particular
> >> path through arm_gen_constant during expand that creates a 0xfffff00f
> >> mask but for a 64-bit HOST_WIDE_INT doesn't sign extend it into
> >> 0xfffffffffffff00f that signifies the required -4081. It leaves it as
> >> 0xfffff00f (4294963215) that breaks when later combine tries to
> >> perform an SImode bitwise AND using the wide-int machinery.
> >>
> >> I think the correct approach here is to use trunc_int_for_mode that
> >> correctly sign-extends the constant so that it is properly
> >> represented by a HOST_WIDE_INT for the required mode.
> >>
> >> Bootstrapped and tested arm-none-linux-gnueabihf with -mtune=xscale
> >> in BOOT_CFLAGS.
> >>
> >> The testcase triggers for -mcpu=xscale and all slowmul targets
> >> because they are the only ones that have the constant_limit tune
> >> parameter set to anything >1 which is required to follow this
> >> particular path through arm_split_constant. Also, the rtx costs can
> >> hide this ICE sometimes.
> >>
> >> Ok for trunk?
> >>
> >> Thanks,
> >> Kyrill
> >>
> >> 2015-02-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> >>
> >> PR target/64600
> >> * config/arm/arm.c (arm_gen_constant, AND case): Call
> >> trunc_int_for_mode when constructing AND mask.
> >>
> >> 2015-02-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
> >>
> >> PR target/64600
> >> * gcc.target/arm/pr64600_1.c: New test.
> >
> >
>
>
next prev parent reply other threads:[~2015-02-26 17:16 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-03 15:18 Kyrill Tkachov
2015-02-10 9:25 ` Kyrill Tkachov
2015-02-18 16:07 ` Kyrill Tkachov
2015-02-26 17:18 ` Kyrill Tkachov [this message]
2015-02-27 14:30 ` Kyrill Tkachov
2015-03-03 17:59 ` Kyrill Tkachov
2015-03-13 9:14 ` Ramana Radhakrishnan
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