[PATCH, AArch64] Fix macro in vdup_lane_2 test case

[PATCH, AArch64] Fix macro in vdup_lane_2 test case

[Ian Bolton]

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This patch fixes a defective macro definition, based on correct
definition in similar testcases.  The test currently passes
through luck rather than correctness.

OK for commit?

Cheers,
Ian


2014-05-08  Ian Bolton  <ian.bolton@arm.com>

gcc/testsuite
	* gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit an
	actual instruction to move into the allocated register.

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diff --git a/gcc/testsuite/gcc.target/aarch64/vdup_lane_2.c b/gcc/testsuite/gcc.target/aarch64/vdup_lane_2.c
index 7c04e75..2072c79 100644
--- a/gcc/testsuite/gcc.target/aarch64/vdup_lane_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/vdup_lane_2.c
@@ -4,10 +4,11 @@
 
 #include <arm_neon.h>
 
-#define force_simd(V1)   asm volatile (""	\
-          : "=w"(V1)				\
-          : "w"(V1)				\
-          : /* No clobbers */)
+/* Used to force a variable to a SIMD register.  */
+#define force_simd(V1)   asm volatile ("orr %0.16b, %1.16b, %1.16b"	\
+	   : "=w"(V1)							\
+	   : "w"(V1)							\
+	   : /* No clobbers */);
 
 extern void abort (void);
 

RE: [PATCH, AArch64] Fix macro in vdup_lane_2 test case

[Ian Bolton]

Ping.  This may well be classed as "obvious", but that's not
obvious to me, so I request a review.  Many thanks.

> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Ian Bolton
> Sent: 08 May 2014 18:42
> To: gcc-patches
> Subject: [PATCH, AArch64] Fix macro in vdup_lane_2 test case
> 
> This patch fixes a defective macro definition, based on correct
> definition in similar testcases.  The test currently passes
> through luck rather than correctness.
> 
> OK for commit?
> 
> Cheers,
> Ian
> 
> 
> 2014-05-08  Ian Bolton  <ian.bolton@arm.com>
> 
> gcc/testsuite
> 	* gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit an
> 	actual instruction to move into the allocated register.

RE: [PATCH, AArch64] Fix macro in vdup_lane_2 test case

[Ian Bolton]

> From: Marcus Shawcroft [mailto:marcus.shawcroft@gmail.com]
> Sent: 19 May 2014 11:45
> To: Ian Bolton
> Cc: gcc-patches
> Subject: Re: [PATCH, AArch64] Fix macro in vdup_lane_2 test case
> 
> On 8 May 2014 18:41, Ian Bolton <ian.bolton@arm.com> wrote:
> 
> > gcc/testsuite
> >         * gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit an
> >         actual instruction to move into the allocated register.
> 
> This macro is attempting to force a value to a particular class of
> register, we don't need or want the mov instruction at all.  Isn't
> something like this sufficient:
> 
> #define force_simd(V1)   asm volatile (""       \
>           : "+w"(V1)                            \
>           :                                     \
>           : /* No clobbers */)
> 
> ?
> 
> /Marcus

Thanks for the review, Marcus.  I did not think of that and it
looks sane, but your suggested approach leads to some of the dup
instructions being optimised away.  Ordinarily, that would be great
but these test cases are trying to force the dups to occur.

Cheers,
Ian

Re: [PATCH, AArch64] Fix macro in vdup_lane_2 test case

[Marcus Shawcroft]

On 8 May 2014 18:41, Ian Bolton <ian.bolton@arm.com> wrote:

> gcc/testsuite
>         * gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit an
>         actual instruction to move into the allocated register.

This macro is attempting to force a value to a particular class of
register, we don't need or want the mov instruction at all.  Isn't
something like this sufficient:

#define force_simd(V1)   asm volatile (""       \
          : "+w"(V1)                            \
          :                                     \
          : /* No clobbers */)

?

/Marcus