[PATCH 2/4][AArch64] Add support for FCCMP

[PATCH 2/4][AArch64] Add support for FCCMP

[Wilco Dijkstra]

This patch adds support for FCCMP. This is trivial with the new CCMP
representation - remove the restriction of FP in ccmp.c and add FCCMP
patterns. Add a test to ensure FCCMP/FCCMPE are emitted as expected.

OK for commit?

ChangeLog:
2015-11-13  Wilco Dijkstra  <wdijkstr@arm.com>

	* gcc/ccmp.c (ccmp_candidate_p): Remove integer-only restriction.
	* gcc/config/aarch64/aarch64.md (fccmp<mode>): New pattern.
	(fccmpe<mode>): Likewise.
	(fcmp): Rename to fcmp and globalize pattern.
	(fcmpe): Likewise.
	* gcc/config/aarch64/aarch64.c (aarch64_gen_ccmp_first): Add FP
support.
	(aarch64_gen_ccmp_next): Add FP support.

gcc/testsuite/
	* gcc.target/aarch64/ccmp_1.c: New testcase.


---
 gcc/ccmp.c                                |  6 ---
 gcc/config/aarch64/aarch64.c              | 24 +++++++++
 gcc/config/aarch64/aarch64.md             | 34 ++++++++++++-
 gcc/testsuite/gcc.target/aarch64/ccmp_1.c | 84
+++++++++++++++++++++++++++++++
 4 files changed, 140 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/ccmp_1.c

diff --git a/gcc/ccmp.c b/gcc/ccmp.c
index ef60a6d..cbdbd6d 100644
--- a/gcc/ccmp.c
+++ b/gcc/ccmp.c
@@ -108,12 +108,6 @@ ccmp_candidate_p (gimple *g)
       || gimple_bb (gs0) != gimple_bb (g))
     return false;
 
-  if (!(INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs0)))
-       || POINTER_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs0))))
-      || !(INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs1)))
-	   || POINTER_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs1)))))
-    return false;
-
   tcode0 = gimple_assign_rhs_code (gs0);
   tcode1 = gimple_assign_rhs_code (gs1);
   if (TREE_CODE_CLASS (tcode0) == tcc_comparison
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index adb222a..a224982 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -12400,6 +12400,18 @@ aarch64_gen_ccmp_first (rtx *prep_seq, rtx
*gen_seq,
       icode = CODE_FOR_cmpdi;
       break;
 
+    case SFmode:
+      cmp_mode = SFmode;
+      cc_mode = aarch64_select_cc_mode ((enum rtx_code) code, op0, op1);
+      icode = cc_mode == CCFPEmode ? CODE_FOR_fcmpesf : CODE_FOR_fcmpsf;
+      break;
+
+    case DFmode:
+      cmp_mode = DFmode;
+      cc_mode = aarch64_select_cc_mode ((enum rtx_code) code, op0, op1);
+      icode = cc_mode == CCFPEmode ? CODE_FOR_fcmpedf : CODE_FOR_fcmpdf;
+      break;
+
     default:
       end_sequence ();
       return NULL_RTX;
@@ -12463,6 +12475,18 @@ aarch64_gen_ccmp_next (rtx *prep_seq, rtx *gen_seq,
rtx prev, int cmp_code,
       icode = CODE_FOR_ccmpdi;
       break;
 
+    case SFmode:
+      cmp_mode = SFmode;
+      cc_mode = aarch64_select_cc_mode ((enum rtx_code) cmp_code, op0,
op1);
+      icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpesf : CODE_FOR_fccmpsf;
+      break;
+
+    case DFmode:
+      cmp_mode = DFmode;
+      cc_mode = aarch64_select_cc_mode ((enum rtx_code) cmp_code, op0,
op1);
+      icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpedf : CODE_FOR_fccmpdf;
+      break;
+
     default:
       end_sequence ();
       return NULL_RTX;
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 18a4808e..04b4ddb 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -279,6 +279,36 @@
   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
 )
 
+(define_insn "fccmp<mode>"
+  [(set (match_operand:CCFP 1 "cc_register" "")
+	(if_then_else:CCFP
+	  (match_operator 4 "aarch64_comparison_operator"
+	   [(match_operand 0 "cc_register" "")
+	    (const_int 0)])
+	  (compare:CCFP
+	    (match_operand:GPF 2 "register_operand" "w")
+	    (match_operand:GPF 3 "register_operand" "w"))
+	  (match_operand 5 "immediate_operand")))]
+  "TARGET_FLOAT"
+  "fccmp\\t%<s>2, %<s>3, %k5, %m4"
+  [(set_attr "type" "fcmp<s>")]
+)
+
+(define_insn "fccmpe<mode>"
+  [(set (match_operand:CCFPE 1 "cc_register" "")
+	 (if_then_else:CCFPE
+	  (match_operator 4 "aarch64_comparison_operator"
+	   [(match_operand 0 "cc_register" "")
+	  (const_int 0)])
+	   (compare:CCFPE
+	    (match_operand:GPF 2 "register_operand" "w")
+	    (match_operand:GPF 3 "register_operand" "w"))
+	  (match_operand 5 "immediate_operand")))]
+  "TARGET_FLOAT"
+  "fccmpe\\t%<s>2, %<s>3, %k5, %m4"
+  [(set_attr "type" "fcmp<s>")]
+)
+
 ;; Expansion of signed mod by a power of 2 using CSNEG.
 ;; For x0 % n where n is a power of 2 produce:
 ;; negs   x1, x0
@@ -2794,7 +2824,7 @@
   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
 )
 
-(define_insn "*cmp<mode>"
+(define_insn "fcmp<mode>"
   [(set (reg:CCFP CC_REGNUM)
         (compare:CCFP (match_operand:GPF 0 "register_operand" "w,w")
 		      (match_operand:GPF 1 "aarch64_fp_compare_operand"
"Y,w")))]
@@ -2805,7 +2835,7 @@
   [(set_attr "type" "fcmp<s>")]
 )
 
-(define_insn "*cmpe<mode>"
+(define_insn "fcmpe<mode>"
   [(set (reg:CCFPE CC_REGNUM)
         (compare:CCFPE (match_operand:GPF 0 "register_operand" "w,w")
 		       (match_operand:GPF 1 "aarch64_fp_compare_operand"
"Y,w")))]
diff --git a/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
new file mode 100644
index 0000000..ef077e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
@@ -0,0 +1,84 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+f1 (int a)
+{
+  return a == 17 || a == 32;
+}
+
+int
+f2 (int a)
+{
+  return a == 33 || a == 18;
+}
+
+int
+f3 (int a, int b)
+{
+  return a == 19 && b == 34;
+}
+
+int
+f4 (int a, int b)
+{
+  return a == 35 && b == 20;
+}
+
+int
+f5 (int a)
+{
+  return a == 0 || a == 5;
+}
+
+int
+f6 (int a)
+{
+  return a == 6 || a == 0;
+}
+
+int
+f7 (int a, int b)
+{
+  return a == 0 && b == 7;
+}
+
+int
+f8 (int a, int b)
+{
+  return a == 9 && b == 0;
+}
+
+int
+f9 (float a, float b)
+{
+  return a < 0.0f && a > b;
+}
+
+int
+f10 (float a, float b)
+{
+  return a == b || b == 0.0f;
+}
+
+int
+f11 (double a, int b)
+{
+  return a < 0.0f && b == 30;
+}
+
+int
+f12 (double a, int b)
+{
+  return b == 31 || a == 0.0f;
+}
+
+int
+f13 (int a, int b)
+{
+  a += b;
+  return a == 3 || a == 0;
+}
+
+/* { dg-final { scan-assembler "fccmp\t" } } */
+/* { dg-final { scan-assembler "fccmpe\t" } } */
-- 
1.9.1

Re: [PATCH 2/4][AArch64] Add support for FCCMP

[Evandro Menezes]

Hi, Wilco.

It looks good to me, but FCMP is quite different from FCCMP on Exynos 
M1, so it'd be helpful to have distinct types for them. Say, "fcmp{s,d}" 
and "fccmp{s,d}".  Would it be acceptable to add this with this patch or 
later?

Thank you.

-- 
Evandro Menezes

On 11/13/2015 10:02 AM, Wilco Dijkstra wrote:
> This patch adds support for FCCMP. This is trivial with the new CCMP
> representation - remove the restriction of FP in ccmp.c and add FCCMP
> patterns. Add a test to ensure FCCMP/FCCMPE are emitted as expected.
>
> OK for commit?
>
> ChangeLog:
> 2015-11-13  Wilco Dijkstra  <wdijkstr@arm.com>
>
> 	* gcc/ccmp.c (ccmp_candidate_p): Remove integer-only restriction.
> 	* gcc/config/aarch64/aarch64.md (fccmp<mode>): New pattern.
> 	(fccmpe<mode>): Likewise.
> 	(fcmp): Rename to fcmp and globalize pattern.
> 	(fcmpe): Likewise.
> 	* gcc/config/aarch64/aarch64.c (aarch64_gen_ccmp_first): Add FP
> support.
> 	(aarch64_gen_ccmp_next): Add FP support.
>
> gcc/testsuite/
> 	* gcc.target/aarch64/ccmp_1.c: New testcase.
>
>
> ---
>   gcc/ccmp.c                                |  6 ---
>   gcc/config/aarch64/aarch64.c              | 24 +++++++++
>   gcc/config/aarch64/aarch64.md             | 34 ++++++++++++-
>   gcc/testsuite/gcc.target/aarch64/ccmp_1.c | 84
> +++++++++++++++++++++++++++++++
>   4 files changed, 140 insertions(+), 8 deletions(-)
>   create mode 100644 gcc/testsuite/gcc.target/aarch64/ccmp_1.c
>
> diff --git a/gcc/ccmp.c b/gcc/ccmp.c
> index ef60a6d..cbdbd6d 100644
> --- a/gcc/ccmp.c
> +++ b/gcc/ccmp.c
> @@ -108,12 +108,6 @@ ccmp_candidate_p (gimple *g)
>         || gimple_bb (gs0) != gimple_bb (g))
>       return false;
>   
> -  if (!(INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs0)))
> -       || POINTER_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs0))))
> -      || !(INTEGRAL_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs1)))
> -	   || POINTER_TYPE_P (TREE_TYPE (gimple_assign_rhs1 (gs1)))))
> -    return false;
> -
>     tcode0 = gimple_assign_rhs_code (gs0);
>     tcode1 = gimple_assign_rhs_code (gs1);
>     if (TREE_CODE_CLASS (tcode0) == tcc_comparison
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index adb222a..a224982 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -12400,6 +12400,18 @@ aarch64_gen_ccmp_first (rtx *prep_seq, rtx
> *gen_seq,
>         icode = CODE_FOR_cmpdi;
>         break;
>   
> +    case SFmode:
> +      cmp_mode = SFmode;
> +      cc_mode = aarch64_select_cc_mode ((enum rtx_code) code, op0, op1);
> +      icode = cc_mode == CCFPEmode ? CODE_FOR_fcmpesf : CODE_FOR_fcmpsf;
> +      break;
> +
> +    case DFmode:
> +      cmp_mode = DFmode;
> +      cc_mode = aarch64_select_cc_mode ((enum rtx_code) code, op0, op1);
> +      icode = cc_mode == CCFPEmode ? CODE_FOR_fcmpedf : CODE_FOR_fcmpdf;
> +      break;
> +
>       default:
>         end_sequence ();
>         return NULL_RTX;
> @@ -12463,6 +12475,18 @@ aarch64_gen_ccmp_next (rtx *prep_seq, rtx *gen_seq,
> rtx prev, int cmp_code,
>         icode = CODE_FOR_ccmpdi;
>         break;
>   
> +    case SFmode:
> +      cmp_mode = SFmode;
> +      cc_mode = aarch64_select_cc_mode ((enum rtx_code) cmp_code, op0,
> op1);
> +      icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpesf : CODE_FOR_fccmpsf;
> +      break;
> +
> +    case DFmode:
> +      cmp_mode = DFmode;
> +      cc_mode = aarch64_select_cc_mode ((enum rtx_code) cmp_code, op0,
> op1);
> +      icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpedf : CODE_FOR_fccmpdf;
> +      break;
> +
>       default:
>         end_sequence ();
>         return NULL_RTX;
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 18a4808e..04b4ddb 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -279,6 +279,36 @@
>     [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
>   )
>   
> +(define_insn "fccmp<mode>"
> +  [(set (match_operand:CCFP 1 "cc_register" "")
> +	(if_then_else:CCFP
> +	  (match_operator 4 "aarch64_comparison_operator"
> +	   [(match_operand 0 "cc_register" "")
> +	    (const_int 0)])
> +	  (compare:CCFP
> +	    (match_operand:GPF 2 "register_operand" "w")
> +	    (match_operand:GPF 3 "register_operand" "w"))
> +	  (match_operand 5 "immediate_operand")))]
> +  "TARGET_FLOAT"
> +  "fccmp\\t%<s>2, %<s>3, %k5, %m4"
> +  [(set_attr "type" "fcmp<s>")]
> +)
> +
> +(define_insn "fccmpe<mode>"
> +  [(set (match_operand:CCFPE 1 "cc_register" "")
> +	 (if_then_else:CCFPE
> +	  (match_operator 4 "aarch64_comparison_operator"
> +	   [(match_operand 0 "cc_register" "")
> +	  (const_int 0)])
> +	   (compare:CCFPE
> +	    (match_operand:GPF 2 "register_operand" "w")
> +	    (match_operand:GPF 3 "register_operand" "w"))
> +	  (match_operand 5 "immediate_operand")))]
> +  "TARGET_FLOAT"
> +  "fccmpe\\t%<s>2, %<s>3, %k5, %m4"
> +  [(set_attr "type" "fcmp<s>")]
> +)
> +
>   ;; Expansion of signed mod by a power of 2 using CSNEG.
>   ;; For x0 % n where n is a power of 2 produce:
>   ;; negs   x1, x0
> @@ -2794,7 +2824,7 @@
>     [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
>   )
>   
> -(define_insn "*cmp<mode>"
> +(define_insn "fcmp<mode>"
>     [(set (reg:CCFP CC_REGNUM)
>           (compare:CCFP (match_operand:GPF 0 "register_operand" "w,w")
>   		      (match_operand:GPF 1 "aarch64_fp_compare_operand"
> "Y,w")))]
> @@ -2805,7 +2835,7 @@
>     [(set_attr "type" "fcmp<s>")]
>   )
>   
> -(define_insn "*cmpe<mode>"
> +(define_insn "fcmpe<mode>"
>     [(set (reg:CCFPE CC_REGNUM)
>           (compare:CCFPE (match_operand:GPF 0 "register_operand" "w,w")
>   		       (match_operand:GPF 1 "aarch64_fp_compare_operand"
> "Y,w")))]
> diff --git a/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
> b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
> new file mode 100644
> index 0000000..ef077e0
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/ccmp_1.c
> @@ -0,0 +1,84 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2" } */
> +
> +int
> +f1 (int a)
> +{
> +  return a == 17 || a == 32;
> +}
> +
> +int
> +f2 (int a)
> +{
> +  return a == 33 || a == 18;
> +}
> +
> +int
> +f3 (int a, int b)
> +{
> +  return a == 19 && b == 34;
> +}
> +
> +int
> +f4 (int a, int b)
> +{
> +  return a == 35 && b == 20;
> +}
> +
> +int
> +f5 (int a)
> +{
> +  return a == 0 || a == 5;
> +}
> +
> +int
> +f6 (int a)
> +{
> +  return a == 6 || a == 0;
> +}
> +
> +int
> +f7 (int a, int b)
> +{
> +  return a == 0 && b == 7;
> +}
> +
> +int
> +f8 (int a, int b)
> +{
> +  return a == 9 && b == 0;
> +}
> +
> +int
> +f9 (float a, float b)
> +{
> +  return a < 0.0f && a > b;
> +}
> +
> +int
> +f10 (float a, float b)
> +{
> +  return a == b || b == 0.0f;
> +}
> +
> +int
> +f11 (double a, int b)
> +{
> +  return a < 0.0f && b == 30;
> +}
> +
> +int
> +f12 (double a, int b)
> +{
> +  return b == 31 || a == 0.0f;
> +}
> +
> +int
> +f13 (int a, int b)
> +{
> +  a += b;
> +  return a == 3 || a == 0;
> +}
> +
> +/* { dg-final { scan-assembler "fccmp\t" } } */
> +/* { dg-final { scan-assembler "fccmpe\t" } } */

RE: [PATCH 2/4][AArch64] Add support for FCCMP

[Wilco Dijkstra]

> Evandro Menezes wrote:
> Hi, Wilco.
> 
> It looks good to me, but FCMP is quite different from FCCMP on Exynos M1,
> so it'd be helpful to have distinct types for them. Say, "fcmp{s,d}"
> and "fccmp{s,d}".  Would it be acceptable to add this with this patch or later?

It would be easy to add fccmps/d as new attributes, I prefer to do that as a separate
patch. Are there any other attributes that you think are missing besides the ones I know
about (extr, 64-bit mul/mla, mulh, bfi)?

Also would we need a new entry in the cost tables?

Wilco

Re: [PATCH 2/4][AArch64] Add support for FCCMP

[Andrew Pinski]

On Sat, Nov 14, 2015 at 1:36 AM, Wilco Dijkstra <Wilco.Dijkstra@arm.com> wrote:
>> Evandro Menezes wrote:
>> Hi, Wilco.
>>
>> It looks good to me, but FCMP is quite different from FCCMP on Exynos M1,
>> so it'd be helpful to have distinct types for them. Say, "fcmp{s,d}"
>> and "fccmp{s,d}".  Would it be acceptable to add this with this patch or later?
>
> It would be easy to add fccmps/d as new attributes, I prefer to do that as a separate
> patch. Are there any other attributes that you think are missing besides the ones I know
> about (extr, 64-bit mul/mla, mulh, bfi)?
>
> Also would we need a new entry in the cost tables?


For ThunderX they can treated as the same.


Thanks,
Andrew

>
> Wilco
>
>

Re: [PATCH 2/4][AArch64] Add support for FCCMP

[Evandro Menezes]

On 11/13/2015 11:36 AM, Wilco Dijkstra wrote:
>> Evandro Menezes wrote:
>> Hi, Wilco.
>>
>> It looks good to me, but FCMP is quite different from FCCMP on Exynos M1,
>> so it'd be helpful to have distinct types for them. Say, "fcmp{s,d}"
>> and "fccmp{s,d}".  Would it be acceptable to add this with this patch or later?
> It would be easy to add fccmps/d as new attributes, I prefer to do that as a separate
> patch. Are there any other attributes that you think are missing besides the ones I know
> about (extr, 64-bit mul/mla, mulh, bfi)?
>
> Also would we need a new entry in the cost tables?
Hi, Wilco.

I don't think that additional entries in the cost tables are needed.

However, I'm afraid that, other than the ones above, no, or perhaps a 
handful of, additional attributes will be needed.  The reason is that, 
so far, I have found few attributes that would make a noticeable 
difference.  As more performance analysis, a never ending task, is done, 
I expect some important attributes to pop, but I cannot anticipate them 
conclusively right now.

Thank you,

-- 
Evandro Menezes