Hi All, I have successfully rebased this and tested in conjunction with a patch from Alan Hayward ([AArch64] [BE] Fix vector load/stores to not use ld1/st1), who should be submitting a new version shortly. Built and tested on: aarch64-none-elf aarch64_be-none-elf x86_64-linux-gnu Regards, David Sherwood. -----Original Message----- From: David Sherwood [mailto:david.sherwood@arm.com] Sent: 28 October 2014 08:55 To: 'gcc-patches@gcc.gnu.org' Subject: RE: [AArch64] [BE] [1/2] Make large opaque integer modes endianness-safe. Hi, Sorry to bother you again. Could someone take a look at this change please if they have time? Thanks! David. -----Original Message----- From: David Sherwood [mailto:david.sherwood@arm.com] Sent: 10 October 2014 15:48 To: gcc-patches@gcc.gnu.org Subject: [AArch64] [BE] [1/2] Make large opaque integer modes endianness-safe. Hi, I have a fix (originally written by Tejas Belagod) for the following bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59810 Could someone take a look please? Thanks! David Sherwood. ChangeLog: gcc/: 2014-11-13 David Sherwood * config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_rglist, aarch64_reverse_mask): New decls. * config/aarch64/iterators.md (UNSPEC_REV_REGLIST): New enum. * config/aarch64/iterators.md (insn_count): New mode_attr. * config/aarch64/aarch64-simd.md (vec_store_lanes(o/c/x)i, vec_load_lanes(o/c/x)i): Fixed to work for Big Endian. * config/aarch64/aarch64-simd.md (aarch64_rev_reglist, aarch64_simd_(ld/st)(2/3/4)): Added. * config/aarch64/aarch64.c (aarch64_simd_attr_length_rglist, aarch64_reverse_mask): Added.