From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1360 invoked by alias); 13 Feb 2013 14:40:09 -0000 Received: (qmail 1348 invoked by uid 22791); 13 Feb 2013 14:40:08 -0000 X-SWARE-Spam-Status: No, hits=-1.3 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_SPAMHAUS_DROP,MSGID_MULTIPLE_AT,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 13 Feb 2013 14:40:01 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Wed, 13 Feb 2013 14:39:59 +0000 Received: from e103227vm ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Wed, 13 Feb 2013 14:39:57 +0000 From: "Greta Yorsh" To: "GCC Patches" Cc: "Ramana Radhakrishnan" , "Richard Earnshaw" Subject: [Patch] Cleanup gcc.target/arm/interrupt-*.c for thumb mode Date: Wed, 13 Feb 2013 14:40:00 -0000 Message-ID: <000901ce09f7$fcab2610$f6017230$@yorsh@arm.com> MIME-Version: 1.0 X-MC-Unique: 113021314395932501 Content-Type: multipart/mixed; boundary="----=_NextPart_000_000A_01CE09F7.FCAB2610" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2013-02/txt/msg00611.txt.bz2 This is a multi-part message in MIME format. ------=_NextPart_000_000A_01CE09F7.FCAB2610 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-length: 401 The tests gcc.target/arm/interrupt-*.c are for ARM mode only.=20 This patch uses effective target arm_notthumb instead of __thumb_ predefine, removes unreachable code, and fixes typos. Ok for trunk? Thanks, Greta ChangeLog gcc/testsuite/ 2012-02-13 Greta Yorsh * gcc.target/arm/interrupt-1.c: Fix for thumb mode. * gcc.target/arm/interrupt-2.c: Likewise. ------=_NextPart_000_000A_01CE09F7.FCAB2610 Content-Type: text/plain; name=3-arm-adjust-tests-interrupt.v2.patch.txt Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="3-arm-adjust-tests-interrupt.v2.patch.txt" Content-length: 2203 diff --git a/gcc/testsuite/gcc.target/arm/interrupt-1.c b/gcc/testsuite/gcc= .target/arm/interrupt-1.c index 18379de..a384242 100644 --- a/gcc/testsuite/gcc.target/arm/interrupt-1.c +++ b/gcc/testsuite/gcc.target/arm/interrupt-1.c @@ -1,10 +1,10 @@ /* Verify that prologue and epilogue are correct for functions with __attribute__ ((interrupt)). */ /* { dg-do compile } */ -/* { dg-options "-O0" } */ +/* { dg-require-effective-target arm_nothumb } */ +/* { dg-options "-O0 -marm" } */ =20 -/* This test is not valid when -mthumb. We just cheat. */ -#ifndef __thumb__ +/* This test is not valid when -mthumb. */ extern void bar (int); extern void foo (void) __attribute__ ((interrupt("IRQ"))); =20 @@ -12,12 +12,6 @@ void foo () { bar (0); } -#else -void foo () -{ - asm ("stmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, lr}"); - asm ("ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}^"); -} -#endif + /* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, l= r}" } } */ /* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, p= c}\\^" } } */ diff --git a/gcc/testsuite/gcc.target/arm/interrupt-2.c b/gcc/testsuite/gcc= .target/arm/interrupt-2.c index b979bf1..61d3130 100644 --- a/gcc/testsuite/gcc.target/arm/interrupt-2.c +++ b/gcc/testsuite/gcc.target/arm/interrupt-2.c @@ -1,26 +1,19 @@ /* Verify that prologue and epilogue are correct for functions with __attribute__ ((interrupt)). */ /* { dg-do compile } */ -/* { dg-options "-O1" } */ +/* { dg-require-effective-target arm_nothumb } */ +/* { dg-options "-O1 -marm" } */ =20 -/* This test is not valid when -mthum. We just cheat. */ -#ifndef __thumb__ +/* This test is not valid when -mthumb. */ extern void bar (int); extern void test (void) __attribute__((__interrupt__)); =20 int foo; void test() { - funcptrs(foo); + bar (foo); foo =3D 0; } -#else -void test () -{ - asm ("stmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, lr}"); - asm ("ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}^"); -} -#endif =20 /* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, l= r}" } } */ /* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, p= c}\\^" } } */ ------=_NextPart_000_000A_01CE09F7.FCAB2610--