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* [PATCH] nvptx: Add support for PTX's cnot instruction.
@ 2022-01-06 16:42 Roger Sayle
  2022-01-07  9:00 ` Tom de Vries
  0 siblings, 1 reply; 2+ messages in thread
From: Roger Sayle @ 2022-01-06 16:42 UTC (permalink / raw)
  To: 'GCC Patches'

[-- Attachment #1: Type: text/plain, Size: 925 bytes --]


Happy New Year for 2022.  This is a simple patch, now that the
nvptx backend has transitioned to STORE_FLAG_VALUE=1, that adds
support for NVidia's cnot instruction, that implements C/C++
style logical negation.

Previously, the simple function:

int foo(int x) { return !x; }

on nvptx-none with -O2 would generate:

        mov.u32 %r24, %ar0;
        setp.eq.u32     %r28, %r24, 0;
        selp.u32        %value, 1, 0, %r28;

with this patch, GCC now generates:

        mov.u32 %r24, %ar0;
        cnot.b32        %value, %r24;


This patch has been tested on nvptx-none hosted on x86_64-pc-linux-gnu
(including newlib) with a make and make -k check with no new failures.
Ok for mainline?


2022-01-06  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	* config/nvptx/nvptx.md (*cnot<mode>2): New define_insn.

gcc/testsuite/ChangeLog
	* gcc.target/nvptx/cnot-1.c: New test case.


Thanks in advance,
Roger
--


[-- Attachment #2: patchn.txt --]
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diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md
index a4c14a3..ce74672 100644
--- a/gcc/config/nvptx/nvptx.md
+++ b/gcc/config/nvptx/nvptx.md
@@ -592,6 +592,13 @@
   ""
   "%.\\tnot.b%T0\\t%0, %1;")
 
+(define_insn "*cnot<mode>2"
+  [(set (match_operand:HSDIM 0 "nvptx_register_operand" "=R")
+	(eq:HSDIM (match_operand:HSDIM 1 "nvptx_register_operand" "R")
+		  (const_int 0)))]
+  ""
+  "%.\\tcnot.b%T0\\t%0, %1;")
+
 (define_insn "bitrev<mode>2"
   [(set (match_operand:SDIM 0 "nvptx_register_operand" "=R")
 	(unspec:SDIM [(match_operand:SDIM 1 "nvptx_register_operand" "R")]
diff --git a/gcc/testsuite/gcc.target/nvptx/cnot-1.c b/gcc/testsuite/gcc.target/nvptx/cnot-1.c
new file mode 100644
index 0000000..d0bdccd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nvptx/cnot-1.c
@@ -0,0 +1,94 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int test1(int x)
+{
+  return !x;
+}
+
+int test2(int x)
+{
+  return x ? 0 : 1;
+}
+
+int test3(int x)
+{
+  return (x == 0) ? 1 : 0;
+}
+
+unsigned int test4(unsigned int x)
+{
+  return !x;
+}
+
+unsigned int test5(unsigned int x)
+{
+  return x ? 0 : 1;
+}
+
+unsigned int test6(unsigned int x)
+{
+  return (x == 0) ? 1 : 0;
+}
+
+short test7(short x)
+{
+  return !x;
+}
+
+short test8(short x)
+{
+  return x ? 0 : 1;
+}
+
+short test9(short x)
+{
+  return (x == 0) ? 1 : 0;
+}
+
+unsigned short test10(unsigned short x)
+{
+  return !x;
+}
+
+unsigned short test11(unsigned short x)
+{
+  return x ? 0 : 1;
+}
+
+unsigned short test12(unsigned short x)
+{
+  return (x == 0) ? 1 : 0;
+}
+
+long test13(long x)
+{
+  return !x;
+}
+
+long test14(long x)
+{
+  return x ? 0 : 1;
+}
+
+long test15(long x)
+{
+  return (x == 0) ? 1: 0;
+}
+
+unsigned long test16(unsigned long x)
+{
+  return !x;
+}
+
+unsigned long test17(unsigned long x)
+{
+  return x ? 0 : 1;
+}
+
+unsigned long test18(unsigned long x)
+{
+  return (x == 0) ? 1 : 0;
+}
+
+/* { dg-final { scan-assembler-times "cnot.b" 18 } } */

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] nvptx: Add support for PTX's cnot instruction.
  2022-01-06 16:42 [PATCH] nvptx: Add support for PTX's cnot instruction Roger Sayle
@ 2022-01-07  9:00 ` Tom de Vries
  0 siblings, 0 replies; 2+ messages in thread
From: Tom de Vries @ 2022-01-07  9:00 UTC (permalink / raw)
  To: Roger Sayle, 'GCC Patches'

On 1/6/22 17:42, Roger Sayle wrote:
> 
> Happy New Year for 2022.  This is a simple patch, now that the
> nvptx backend has transitioned to STORE_FLAG_VALUE=1, that adds
> support for NVidia's cnot instruction, that implements C/C++
> style logical negation.
> 

Happy newyear to you too :)

LGTM, please apply.

Thanks,
- Tom

> Previously, the simple function:
> 
> int foo(int x) { return !x; }
> 
> on nvptx-none with -O2 would generate:
> 
>          mov.u32 %r24, %ar0;
>          setp.eq.u32     %r28, %r24, 0;
>          selp.u32        %value, 1, 0, %r28;
> 
> with this patch, GCC now generates:
> 
>          mov.u32 %r24, %ar0;
>          cnot.b32        %value, %r24;
> 
> 
> This patch has been tested on nvptx-none hosted on x86_64-pc-linux-gnu
> (including newlib) with a make and make -k check with no new failures.
> Ok for mainline?
> 
> 
> 2022-01-06  Roger Sayle  <roger@nextmovesoftware.com>
> 
> gcc/ChangeLog
> 	* config/nvptx/nvptx.md (*cnot<mode>2): New define_insn.
> 
> gcc/testsuite/ChangeLog
> 	* gcc.target/nvptx/cnot-1.c: New test case.
> 
> 
> Thanks in advance,
> Roger
> --
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2022-01-07  9:00 ` Tom de Vries

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