From: "Roger Sayle" <roger@nextmovesoftware.com>
To: "'Jeff Law'" <jeffreyalaw@gmail.com>, <gcc-patches@gcc.gnu.org>,
"'YunQiang Su'" <syq@gcc.gnu.org>
Subject: RE: [PATCH v3] EXPR: Emit an truncate if 31+ bits polluted for SImode
Date: Sun, 24 Dec 2023 08:51:07 -0000 [thread overview]
Message-ID: <000f01da3646$57092a40$051b7ec0$@nextmovesoftware.com> (raw)
In-Reply-To: <7518ec8d-ac4a-4d3e-a063-caa0ee520acf@gmail.com>
> What's exceedingly weird is T_N_T_M_P (DImode, SImode) isn't actually a
> truncation! The output precision is first, the input precision is second. The docs
> explicitly state the output precision should be smaller than the input precision
> (which makes sense for truncation).
>
> That's where I'd start with trying to untangle this mess.
Thanks (both) for correcting my misunderstanding.
At the very least might I suggest that we introduce a new
TRULY_NOOP_EXTENSION_MODES_P target hook that MIPS
can use for this purpose? It'd help reduce confusion, and keep
the documentation/function naming correct.
When Richard Sandiford "hookized" truly_noop_truncation in 2017
https://gcc.gnu.org/legacy-ml/gcc-patches/2017-09/msg00836.html
he mentions the inprec/outprec confusion [deciding not to add a
gcc_assert outprec < inprec here, which might be a good idea].
The next question is whether this is just
TRULY_NOOP_SIGN_EXTENSION_MODES_P
or whether there are any targets that usefully ensure some modes
are zero-extended forms of others. TRULY_NOOP_ZERO_EXTENSION...
My vote is that a DINS instruction that updates the most significant
bit of an SImode value should then expand or define_insn_and_split
with an explicit following sign-extension operation. To avoid this being
eliminated by the RTL optimizers/combine the DINS should return a
DImode result, with the following extension truncating it to canonical
SImode form. This preserves the required backend invariant (and
doesn't require tweaking machine-independent code in combine).
SImode DINS instructions that don't/can't affect the MSB, can be a
single SImode instruction.
Cheers,
Roger
--
next prev parent reply other threads:[~2023-12-24 8:51 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-24 0:49 Roger Sayle
2023-12-24 5:38 ` Jeff Law
2023-12-24 8:51 ` Roger Sayle [this message]
2023-12-24 9:15 ` YunQiang Su
2023-12-24 9:28 ` Andrew Pinski
2023-12-24 12:24 ` Roger Sayle
2023-12-28 18:26 ` Jeff Law
2023-12-24 8:29 ` YunQiang Su
-- strict thread matches above, loose matches on Subject: below --
2023-12-23 8:58 YunQiang Su
2023-12-23 16:51 ` Jeff Law
2023-12-23 22:46 ` YunQiang Su
2023-12-24 5:27 ` Jeff Law
2023-12-24 8:11 ` YunQiang Su
2023-12-28 18:11 ` Jeff Law
2024-01-03 23:39 ` Richard Sandiford
2024-01-09 18:49 ` Jeff Law
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