From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10139 invoked by alias); 29 Oct 2014 10:37:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 10045 invoked by uid 89); 29 Oct 2014 10:37:43 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 29 Oct 2014 10:37:42 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Wed, 29 Oct 2014 10:37:39 +0000 Received: from shawin003 ([10.164.2.40]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 29 Oct 2014 10:37:39 +0000 From: "Zhenqiang Chen" To: "'Richard Henderson'" Cc: References: <001901cfd6fa$01aa2690$04fe73b0$@arm.com> <54398F1E.4000209@redhat.com> <001201cff1ba$91830e50$b4892af0$@arm.com> <544E68D8.3060505@redhat.com> In-Reply-To: <544E68D8.3060505@redhat.com> Subject: RE: [Ping] [PATCH, 8/10] aarch64: ccmp insn patterns Date: Wed, 29 Oct 2014 10:42:00 -0000 Message-ID: <001101cff364$5a307cc0$0e917640$@arm.com> MIME-Version: 1.0 X-MC-Unique: 114102910373909201 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0012_01CFF3A7.68551C50" X-IsSubscribed: yes X-SW-Source: 2014-10/txt/msg03038.txt.bz2 This is a multipart message in MIME format. ------=_NextPart_000_0012_01CFF3A7.68551C50 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-length: 3269 > -----Original Message----- > From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches- > owner@gcc.gnu.org] On Behalf Of Richard Henderson > Sent: Monday, October 27, 2014 11:47 PM > To: Zhenqiang Chen > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [Ping] [PATCH, 8/10] aarch64: ccmp insn patterns >=20 > On 10/27/2014 12:49 AM, Zhenqiang Chen wrote: > > + {AARCH64_CC_Z, 0}, /* EQ, Z =3D=3D 1. */ {0, AARCH64_CC_Z}, /* NE,= Z > > + =3D=3D 0. */ {AARCH64_CC_C, 0}, /* CS, C =3D=3D 1. */ {0, AARCH64= _CC_C}, > > + /* CC, C =3D=3D 0. */ {0, 0}, /* MI, not supported*/ {0, 0}, /* PL, > > + not supported*/ {0, 0}, /* VS, not supported*/ {0, 0}, /* VC, not > > + supported*/ >=20 > Why not go ahead and fill out the table? You know what needs to go in these > slots, after all. Updated. > > + {AARCH64_CC_C, AARCH64_CC_Z}, /* HI, C =3D=3D1 && Z =3D=3D 0. */ > > + {AARCH64_CC_Z, AARCH64_CC_C}, /* LS, !(C =3D=3D 1 && Z =3D=3D 0). */ > > + {AARCH64_CC_N | AARCH64_CC_V, AARCH64_CC_N}, /* GE, N =3D=3D V. */ > > + {AARCH64_CC_N, AARCH64_CC_N | AARCH64_CC_V}, /* LT, N !=3D V. */ > > + {AARCH64_CC_N | AARCH64_CC_V, AARCH64_CC_Z}, /* GT, Z =3D=3D 0 && N > =3D=3D > > + V. */ {AARCH64_CC_Z, AARCH64_CC_N | AARCH64_CC_V}, /* LE, !(Z =3D=3D > 0 > > + && N =3D=3D V). */ >=20 > Perhaps it's me, but does it make things clearer to reduce these? > That is, for the compound conditions, we need not make both sub-conditions > be false, only one of them. E.g. >=20 > {AARCH64_CC_C, 0} /* HI, C =3D=3D1 && Z =3D=3D 0. */ > {0, AARCH64_CC_C} /* LS, !(C =3D=3D1 && Z =3D=3D 0) */ > {0, AARCH64_CC_V} /* GE, N =3D=3D V */ > {AARCH64_CC_V, 0} /* LT, N !=3D V */ > {0, AARCH64_CC_Z} /* GT, Z =3D=3D 0 && N =3D=3D V */ > {AARCH64_CC_Z, 0} /* LE, !(Z =3D=3D 0 && N =3D=3D V) */ >=20 > At which point it becomes blindingly obvious that while we can't compress > the table with ~nczv, we can index it with reverse_comparison instead. Updated. > > + case 'k': > > + { > > + int cond_code; > > + rtx op0 =3D XEXP (x, 0); > > + enum rtx_code mode_code; > > + /* Print a condition (eq, ne, etc) of ccmp. */ > > + > > + if (!COMPARISON_P (x) || !ccmp_cc_register (op0, GET_MODE > (op0))) > > + { > > + output_operand_lossage ("invalid operand for '%%%c'", code); > > + return; > > + } > > + > > + mode_code =3D aarch64_ccmp_mode_to_code (GET_MODE (op0)); > > + cond_code =3D aarch64_get_condition_code_1 (CCmode, mode_code); > > + gcc_assert (cond_code >=3D 0); > > + fputs (aarch64_condition_codes[cond_code], f); > > + } >=20 > Is there a branch with all the patches applied? I can't look back at the > modified aarch64_get_condition_code_1, but off-hand I can't think of > why %m/%M wouldn't work. Surely It's my fault. %m/%M work well in the new patch. And I add a check=20 aarch64_ccmp_mode_to_code (GET_MODE (operands[1])) =3D=3D GET_CODE (operand= s[5]) on the patterns to make sure that the compare and CC mode are aligned. Thanks! -Zhenqiang =20 > aarch64_get_condition_code_1 (GET_MODE (op0), GET_CODE (x)) >=20 > will yield the correct cond_code. If it didn't, then surely branches wouldn't > work at all. >=20 > These are not some magic new kind of conditions; they're exactly the same. >=20 >=20 > r~ ------=_NextPart_000_0012_01CFF3A7.68551C50 Content-Transfer-Encoding: base64 Content-Type: application/octet-stream; name="7-8-ccmp-patterns.patch" Content-Disposition: attachment; filename="7-8-ccmp-patterns.patch" Content-length: 9622 ZGlmZiAtLWdpdCBhL2djYy9jb25maWcvYWFyY2g2NC9hYXJjaDY0LXByb3Rv cy5oIGIvZ2NjL2NvbmZpZy9hYXJjaDY0L2FhcmNoNjQtcHJvdG9zLmgKaW5k ZXggYzU3YTQ2Ny4uMjMzNGEzMCAxMDA2NDQKLS0tIGEvZ2NjL2NvbmZpZy9h YXJjaDY0L2FhcmNoNjQtcHJvdG9zLmgKKysrIGIvZ2NjL2NvbmZpZy9hYXJj aDY0L2FhcmNoNjQtcHJvdG9zLmgKQEAgLTMxMyw0ICszMTMsNSBAQCBleHRl cm4gdm9pZCBhYXJjaDY0X2ZpbmFsX3ByZXNjYW5faW5zbiAocnR4X2luc24g Kik7CiBleHRlcm4gYm9vbAogYWFyY2g2NF9leHBhbmRfdmVjX3Blcm1fY29u c3QgKHJ0eCB0YXJnZXQsIHJ0eCBvcDAsIHJ0eCBvcDEsIHJ0eCBzZWwpOwog dm9pZCBhYXJjaDY0X2F0b21pY19hc3NpZ25fZXhwYW5kX2ZlbnYgKHRyZWUg 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