* [PATCH,ARM][1/5] Add ffmas and ffmad type attribute
2013-01-25 18:15 [PATCH,ARM][0/5] Updates to cortex-a7 pipeline description Greta Yorsh
@ 2013-01-25 18:21 ` Greta Yorsh
2013-01-29 17:46 ` Ramana Radhakrishnan
2013-01-25 18:23 ` [PATCH,ARM][2/5] Update cortex-a7 vfp/neon pipeline description Greta Yorsh
` (3 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Greta Yorsh @ 2013-01-25 18:21 UTC (permalink / raw)
To: GCC Patches
Cc: Richard Earnshaw, Ramana Radhakrishnan, nickc, paul, Greta Yorsh
[-- Attachment #1: Type: text/plain, Size: 1672 bytes --]
Fused and not fused multiply and accumulated operations may have different
timing characteristics, for example in Cortex-A7. Currently, the compiler
captures all of these operations using the same "type" attribute fmac.
This patch adds a new "type" attribute ffma to separate fused operations
from other fmac operations, for both single and double precision floating
point. The patch also updates existing pipeline descriptions to use both
fmac and ffma whenever fmac was used, so that the generated code remains
unaffected.
A subsequent patch for Cortex-A7 pipeline description takes advantage of the
distinction between fused and other mac operations.
gcc/
2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.md (type): Add ffmas and ffmad to "type" attribute.
* config/arm/vfp.md (fma,fmsub,fnmsub,fnmadd): Change type
from fmac to ffma.
* config/arm/vfp11.md (vfp_farith): Use ffmas.
(vfp_fmul): Use ffmad.
* config/arm/cortex-r4f.md (cortex_r4_fmacs): Use ffmas.
(cortex_r4_fmacd): Use ffmad.
* config/arm/cortex-m4-fpu.md (cortex_m4_fmacs): Use ffmas.
* config/arm/cortex-a9.md (cortex_a9_fmacs): Use ffmas.
(cortex_a9_fmacd): Use ffmad.
* config/arm/cortex-a8-neon.md (cortex_a8_vfp_macs): Use ffmas.
(cortex_a8_vfp_macd): Use ffmad.
* config/arm/cortex-a5.md (cortex_a5_fpmacs): Use ffmas.
(cortex_a5_fpmacd): Use ffmad.
* config/arm/cortex-a15-neon.md (cortex_a15_vfp_macs) Use ffmas.
(cortex_a15_vfp_macd): Use ffmad.
* config/arm/arm1020e.md (v10_fmul): Use ffmas and ffmad.
[-- Attachment #2: 1-ffma-type-attr.v2.patch.txt --]
[-- Type: text/plain, Size: 8710 bytes --]
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 6b8e9a75fa4ca7f4f09ae34f5b69c1b71044f9d8..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -284,6 +284,8 @@ (define_attr "type"
fmuld,\
fmacs,\
fmacd,\
+ ffmas,\
+ ffmad,\
f_rints,\
f_rintd,\
f_flag,\
diff --git a/gcc/config/arm/arm1020e.md b/gcc/config/arm/arm1020e.md
index 9a41d30573605d845385e79966737f44ee61e168..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/arm1020e.md
+++ b/gcc/config/arm/arm1020e.md
@@ -284,7 +284,7 @@ (define_insn_reservation "v10_cvt" 5
(define_insn_reservation "v10_fmul" 6
(and (eq_attr "vfp10" "yes")
- (eq_attr "type" "fmuls,fmacs,fmuld,fmacd"))
+ (eq_attr "type" "fmuls,fmacs,ffmas,fmuld,fmacd,ffmad"))
"1020a_e+v10_fmac*2")
(define_insn_reservation "v10_fdivs" 18
diff --git a/gcc/config/arm/cortex-a15-neon.md b/gcc/config/arm/cortex-a15-neon.md
index afb67a587526fae8145a8474871cc1d4fbe7e3c9..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/cortex-a15-neon.md
+++ b/gcc/config/arm/cortex-a15-neon.md
@@ -505,12 +505,12 @@ (define_insn_reservation "cortex_a15_vfp
(define_insn_reservation "cortex_a15_vfp_macs" 6
(and (eq_attr "tune" "cortexa15")
- (eq_attr "type" "fmacs"))
+ (eq_attr "type" "fmacs,ffmas"))
"ca15_issue1,ca15_cx_vfp")
(define_insn_reservation "cortex_a15_vfp_macd" 11
(and (eq_attr "tune" "cortexa15")
- (eq_attr "type" "fmacd"))
+ (eq_attr "type" "fmacd,ffmad"))
"ca15_issue2,ca15_cx_vfp*2")
(define_insn_reservation "cortex_a15_vfp_cvt" 6
diff --git a/gcc/config/arm/cortex-a5.md b/gcc/config/arm/cortex-a5.md
index 2b5abe524a63a6c90fc3da1b255b163d44c1455b..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/cortex-a5.md
+++ b/gcc/config/arm/cortex-a5.md
@@ -185,7 +185,7 @@ (define_insn_reservation "cortex_a5_fpmu
(define_insn_reservation "cortex_a5_fpmacs" 8
(and (eq_attr "tune" "cortexa5")
- (eq_attr "type" "fmacs"))
+ (eq_attr "type" "fmacs,ffmas"))
"cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
;; Non-multiply instructions can issue in the middle two instructions of a
@@ -201,7 +201,7 @@ (define_insn_reservation "cortex_a5_fpmu
(define_insn_reservation "cortex_a5_fpmacd" 11
(and (eq_attr "tune" "cortexa5")
- (eq_attr "type" "fmacd"))
+ (eq_attr "type" "fmacd,ffmad"))
"cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
diff --git a/gcc/config/arm/cortex-a8-neon.md b/gcc/config/arm/cortex-a8-neon.md
index 03f52b2df8a99ea709ac42cabcc32de587ac403f..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/cortex-a8-neon.md
+++ b/gcc/config/arm/cortex-a8-neon.md
@@ -149,12 +149,12 @@ (define_insn_reservation "cortex_a8_vfp_
(define_insn_reservation "cortex_a8_vfp_macs" 21
(and (eq_attr "tune" "cortexa8")
- (eq_attr "type" "fmacs"))
+ (eq_attr "type" "fmacs,ffmas"))
"cortex_a8_vfp,cortex_a8_vfplite*20")
(define_insn_reservation "cortex_a8_vfp_macd" 26
(and (eq_attr "tune" "cortexa8")
- (eq_attr "type" "fmacd"))
+ (eq_attr "type" "fmacd,ffmad"))
"cortex_a8_vfp,cortex_a8_vfplite*25")
(define_insn_reservation "cortex_a8_vfp_divs" 37
diff --git a/gcc/config/arm/cortex-a9.md b/gcc/config/arm/cortex-a9.md
index f1bd7cfa91a5875069fcdf14da230112eb28d32e..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/cortex-a9.md
+++ b/gcc/config/arm/cortex-a9.md
@@ -203,7 +203,7 @@ (define_insn_reservation "cortex_a9_call
;; Pipeline Instruction Classification.
;; FPS - fcpys, ffariths, ffarithd,r_2_f,f_2_r
;; FP_ADD - fadds, faddd, fcmps (1)
-;; FPMUL - fmul{s,d}, fmac{s,d}
+;; FPMUL - fmul{s,d}, fmac{s,d}, ffma{s,d}
;; FPDIV - fdiv{s,d}
(define_cpu_unit "ca9fps" "cortex_a9")
(define_cpu_unit "ca9fp_add1, ca9fp_add2, ca9fp_add3, ca9fp_add4" "cortex_a9")
@@ -253,12 +253,12 @@ (define_insn_reservation "cortex_a9_fmul
(define_insn_reservation "cortex_a9_fmacs" 8
(and (eq_attr "tune" "cortexa9")
- (eq_attr "type" "fmacs"))
+ (eq_attr "type" "fmacs,ffmas"))
"ca9fmuls, ca9fp_add")
(define_insn_reservation "cortex_a9_fmacd" 9
(and (eq_attr "tune" "cortexa9")
- (eq_attr "type" "fmacd"))
+ (eq_attr "type" "fmacd,ffmad"))
"ca9fmuld, ca9fp_add")
;; Division pipeline description.
diff --git a/gcc/config/arm/cortex-m4-fpu.md b/gcc/config/arm/cortex-m4-fpu.md
index 6fd5faf74ee6336c7cc865946bf2db5d2bcc14cb..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/cortex-m4-fpu.md
+++ b/gcc/config/arm/cortex-m4-fpu.md
@@ -46,7 +46,7 @@ (define_insn_reservation "cortex_m4_fmul
(define_insn_reservation "cortex_m4_fmacs" 4
(and (eq_attr "tune" "cortexm4")
- (eq_attr "type" "fmacs"))
+ (eq_attr "type" "fmacs,ffmas"))
"cortex_m4_ex_v*3")
(define_insn_reservation "cortex_m4_ffariths" 1
diff --git a/gcc/config/arm/cortex-r4f.md b/gcc/config/arm/cortex-r4f.md
index 8982bc068eb3f5276d50a4871bfa28b73bd1f31a..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/cortex-r4f.md
+++ b/gcc/config/arm/cortex-r4f.md
@@ -63,7 +63,7 @@ (define_insn_reservation "cortex_r4_fari
(define_insn_reservation "cortex_r4_fmacs" 6
(and (eq_attr "tune_cortexr4" "yes")
- (eq_attr "type" "fmacs"))
+ (eq_attr "type" "fmacs,ffmas"))
"(cortex_r4_issue_a+cortex_r4_v1)|(cortex_r4_issue_b+cortex_r4_vmla)")
(define_insn_reservation "cortex_r4_fdivs" 17
@@ -119,7 +119,7 @@ (define_bypass 16 "cortex_r4_fdivs"
(define_insn_reservation "cortex_r4_fmacd" 20
(and (eq_attr "tune_cortexr4" "yes")
- (eq_attr "type" "fmacd"))
+ (eq_attr "type" "fmacd,ffmad"))
"cortex_r4_single_issue*13")
(define_insn_reservation "cortex_r4_farith" 10
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index a5c461df36f9dd6613a03d5d68d58dab851252ba..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -33,6 +33,8 @@
;; fmuld Double precision multiply.
;; fmacs Single precision multiply-accumulate.
;; fmacd Double precision multiply-accumulate.
+;; ffmas Single precision fused multiply-accumulate.
+;; ffmad Double precision fused multiply-accumulate.
;; fdivs Single precision sqrt or division.
;; fdivd Double precision sqrt or division.
;; f_flag fmstat operation
@@ -910,7 +912,7 @@ (define_insn "fma<SDF:mode>4"
"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
"vfma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "predicable" "yes")
- (set_attr "type" "fmac<vfp_type>")]
+ (set_attr "type" "ffma<vfp_type>")]
)
(define_insn "*fmsub<SDF:mode>4"
@@ -922,7 +924,7 @@ (define_insn "*fmsub<SDF:mode>4"
"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
"vfms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "predicable" "yes")
- (set_attr "type" "fmac<vfp_type>")]
+ (set_attr "type" "ffma<vfp_type>")]
)
(define_insn "*fnmsub<SDF:mode>4"
@@ -933,7 +935,7 @@ (define_insn "*fnmsub<SDF:mode>4"
"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
"vfnms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "predicable" "yes")
- (set_attr "type" "fmac<vfp_type>")]
+ (set_attr "type" "ffma<vfp_type>")]
)
(define_insn "*fnmadd<SDF:mode>4"
@@ -945,7 +947,7 @@ (define_insn "*fnmadd<SDF:mode>4"
"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
"vfnma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "predicable" "yes")
- (set_attr "type" "fmac<vfp_type>")]
+ (set_attr "type" "ffma<vfp_type>")]
)
diff --git a/gcc/config/arm/vfp11.md b/gcc/config/arm/vfp11.md
index 8f863fd70cd0a5124675bac8211249fb3db7170e..0000000000000000000000000000000000000000 100644
--- a/gcc/config/arm/vfp11.md
+++ b/gcc/config/arm/vfp11.md
@@ -56,12 +56,12 @@ (define_insn_reservation "vfp_ffarith" 4
(define_insn_reservation "vfp_farith" 8
(and (eq_attr "generic_vfp" "yes")
- (eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,fmuls,fmacs"))
+ (eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,fmuls,fmacs,ffmas"))
"fmac")
(define_insn_reservation "vfp_fmul" 9
(and (eq_attr "generic_vfp" "yes")
- (eq_attr "type" "fmuld,fmacd"))
+ (eq_attr "type" "fmuld,fmacd,ffmad"))
"fmac*2")
(define_insn_reservation "vfp_fdivs" 19
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH,ARM][1/5] Add ffmas and ffmad type attribute
2013-01-25 18:21 ` [PATCH,ARM][1/5] Add ffmas and ffmad type attribute Greta Yorsh
@ 2013-01-29 17:46 ` Ramana Radhakrishnan
0 siblings, 0 replies; 11+ messages in thread
From: Ramana Radhakrishnan @ 2013-01-29 17:46 UTC (permalink / raw)
To: Greta Yorsh; +Cc: GCC Patches, Richard Earnshaw, nickc, paul
> gcc/
>
> 2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
>
> * config/arm/arm.md (type): Add ffmas and ffmad to "type" attribute.
> * config/arm/vfp.md (fma,fmsub,fnmsub,fnmadd): Change type
> from fmac to ffma.
> * config/arm/vfp11.md (vfp_farith): Use ffmas.
> (vfp_fmul): Use ffmad.
> * config/arm/cortex-r4f.md (cortex_r4_fmacs): Use ffmas.
> (cortex_r4_fmacd): Use ffmad.
> * config/arm/cortex-m4-fpu.md (cortex_m4_fmacs): Use ffmas.
> * config/arm/cortex-a9.md (cortex_a9_fmacs): Use ffmas.
> (cortex_a9_fmacd): Use ffmad.
> * config/arm/cortex-a8-neon.md (cortex_a8_vfp_macs): Use ffmas.
> (cortex_a8_vfp_macd): Use ffmad.
> * config/arm/cortex-a5.md (cortex_a5_fpmacs): Use ffmas.
> (cortex_a5_fpmacd): Use ffmad.
> * config/arm/cortex-a15-neon.md (cortex_a15_vfp_macs) Use ffmas.
> (cortex_a15_vfp_macd): Use ffmad.
> * config/arm/arm1020e.md (v10_fmul): Use ffmas and ffmad.
>
This is ok as it is only a tuning change.
Ramana
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH,ARM][2/5] Update cortex-a7 vfp/neon pipeline description
2013-01-25 18:15 [PATCH,ARM][0/5] Updates to cortex-a7 pipeline description Greta Yorsh
2013-01-25 18:21 ` [PATCH,ARM][1/5] Add ffmas and ffmad type attribute Greta Yorsh
@ 2013-01-25 18:23 ` Greta Yorsh
2013-01-29 17:47 ` Ramana Radhakrishnan
2013-01-25 18:25 ` [PATCH,ARM][4/5] Fix calls in cortex-a7 " Greta Yorsh
` (2 subsequent siblings)
4 siblings, 1 reply; 11+ messages in thread
From: Greta Yorsh @ 2013-01-25 18:23 UTC (permalink / raw)
To: GCC Patches
Cc: Richard Earnshaw, Ramana Radhakrishnan, nickc, paul, Greta Yorsh
[-- Attachment #1: Type: text/plain, Size: 700 bytes --]
This patch updates the description of vmul, vdiv, vsqrt, vmla,vmls, vfma,
vfms operations for vfp and neon. It uses ffmas and ffmad type attribute
introduced by the previous patch.
gcc/
2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/cortex-a7.md (cortex_a7_neon_mul, cortex_a7_neon_mla):
New
reservations.
(cortex_a7_fpfmad): New reservation.
(cortex_a7_fpmacs): Use ffmas and update required units.
(cortex_a7_fpmuld): Update required units and latency.
(cortex_a7_fpmacd): Likewise.
(cortex_a7_fdivs, cortex_a7_fdivd): Likewise.
(cortex_a7_neon). Likewise.
(bypass) Update participating units.
[-- Attachment #2: 2-pipe-vfp-neon.v3.patch.txt --]
[-- Type: text/plain, Size: 6464 bytes --]
diff --git a/gcc/config/arm/cortex-a7.md b/gcc/config/arm/cortex-a7.md
index 74d4ca0..ce70576 100644
--- a/gcc/config/arm/cortex-a7.md
+++ b/gcc/config/arm/cortex-a7.md
@@ -202,6 +202,9 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Floating-point arithmetic.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Neon integer, neon floating point, and single-precision floating
+;; point instructions of the same type have the same timing
+;; characteristics, but neon instructions cannot dual-issue.
(define_insn_reservation "cortex_a7_fpalu" 4
(and (eq_attr "tune" "cortexa7")
@@ -229,18 +232,37 @@
(eq_attr "neon_type" "none")))
"cortex_a7_ex1+cortex_a7_fpmul_pipe")
-;; For single-precision multiply-accumulate, the add (accumulate) is issued
-;; whilst the multiply is in F4. The multiply result can then be forwarded
-;; from F5 to F1. The issue unit is only used once (when we first start
-;; processing the instruction), but the usage of the FP add pipeline could
-;; block other instructions attempting to use it simultaneously. We try to
-;; avoid that using cortex_a7_fpadd_pipe.
+(define_insn_reservation "cortex_a7_neon_mul" 4
+ (and (eq_attr "tune" "cortexa7")
+ (eq_attr "neon_type"
+ "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+ neon_mul_qqq_8_16_32_ddd_32,\
+ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\
+ neon_mul_ddd_16_scalar_32_16_long_scalar,\
+ neon_mul_qqd_32_scalar,\
+ neon_fp_vmul_ddd,\
+ neon_fp_vmul_qqd"))
+ "(cortex_a7_both+cortex_a7_fpmul_pipe)*2")
(define_insn_reservation "cortex_a7_fpmacs" 8
(and (eq_attr "tune" "cortexa7")
- (and (eq_attr "type" "fmacs")
+ (and (eq_attr "type" "fmacs,ffmas")
(eq_attr "neon_type" "none")))
- "cortex_a7_ex1+cortex_a7_fpmul_pipe, nothing*3, cortex_a7_fpadd_pipe")
+ "cortex_a7_ex1+cortex_a7_fpmul_pipe")
+
+(define_insn_reservation "cortex_a7_neon_mla" 8
+ (and (eq_attr "tune" "cortexa7")
+ (eq_attr "neon_type"
+ "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+ neon_mla_qqq_8_16,\
+ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\
+ neon_mla_qqq_32_qqd_32_scalar,\
+ neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,\
+ neon_fp_vmla_ddd,\
+ neon_fp_vmla_qqq,\
+ neon_fp_vmla_ddd_scalar,\
+ neon_fp_vmla_qqq_scalar"))
+ "cortex_a7_both+cortex_a7_fpmul_pipe")
;; Non-multiply instructions can issue between two cycles of a
;; double-precision multiply.
@@ -249,15 +271,19 @@
(and (eq_attr "tune" "cortexa7")
(and (eq_attr "type" "fmuld")
(eq_attr "neon_type" "none")))
- "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*2,\
- cortex_a7_ex1+cortex_a7_fpmul_pipe")
+ "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*3")
(define_insn_reservation "cortex_a7_fpmacd" 11
(and (eq_attr "tune" "cortexa7")
(and (eq_attr "type" "fmacd")
(eq_attr "neon_type" "none")))
- "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*2,\
- cortex_a7_ex1+cortex_a7_fpmul_pipe, nothing*3, cortex_a7_fpadd_pipe")
+ "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*3")
+
+(define_insn_reservation "cortex_a7_fpfmad" 8
+ (and (eq_attr "tune" "cortexa7")
+ (and (eq_attr "type" "ffmad")
+ (eq_attr "neon_type" "none")))
+ "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*4")
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Floating-point divide/square root instructions.
@@ -267,13 +293,13 @@
(and (eq_attr "tune" "cortexa7")
(and (eq_attr "type" "fdivs")
(eq_attr "neon_type" "none")))
- "cortex_a7_ex1, cortex_a7_fp_div_sqrt * 14")
+ "cortex_a7_ex1+cortex_a7_fp_div_sqrt, cortex_a7_fp_div_sqrt * 13")
-(define_insn_reservation "cortex_a7_fdivd" 29
+(define_insn_reservation "cortex_a7_fdivd" 31
(and (eq_attr "tune" "cortexa7")
(and (eq_attr "type" "fdivd")
(eq_attr "neon_type" "none")))
- "cortex_a7_ex1, cortex_a7_fp_div_sqrt * 28")
+ "cortex_a7_ex1+cortex_a7_fp_div_sqrt, cortex_a7_fp_div_sqrt * 28")
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; VFP to/from core transfers.
@@ -338,16 +364,36 @@
;; i.e. a latency of two.
(define_bypass 2 "cortex_a7_f_loads, cortex_a7_f_loadd"
- "cortex_a7_fpalu, cortex_a7_fpmacs, cortex_a7_fpmuld,\
- cortex_a7_fpmacd, cortex_a7_fdivs, cortex_a7_fdivd,\
- cortex_a7_f2r")
+ "cortex_a7_fpalu,\
+ cortex_a7_fpmuls,cortex_a7_fpmacs,\
+ cortex_a7_fpmuld,cortex_a7_fpmacd, cortex_a7_fpfmad,\
+ cortex_a7_fdivs, cortex_a7_fdivd,\
+ cortex_a7_f2r")
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; NEON load/store.
+;; NEON
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Simple modeling for all neon instructions not covered earlier.
(define_insn_reservation "cortex_a7_neon" 4
(and (eq_attr "tune" "cortexa7")
- (eq_attr "neon_type" "!none"))
+ (eq_attr "neon_type"
+ "!none,\
+ neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+ neon_mul_qqq_8_16_32_ddd_32,\
+ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\
+ neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+ neon_mla_qqq_8_16,\
+ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\
+ neon_mla_qqq_32_qqd_32_scalar,\
+ neon_mul_ddd_16_scalar_32_16_long_scalar,\
+ neon_mul_qqd_32_scalar,\
+ neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,\
+ neon_fp_vmul_ddd,\
+ neon_fp_vmul_qqd,\
+ neon_fp_vmla_ddd,\
+ neon_fp_vmla_qqq,\
+ neon_fp_vmla_ddd_scalar,\
+ neon_fp_vmla_qqq_scalar"))
"cortex_a7_both*2")
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH,ARM][2/5] Update cortex-a7 vfp/neon pipeline description
2013-01-25 18:23 ` [PATCH,ARM][2/5] Update cortex-a7 vfp/neon pipeline description Greta Yorsh
@ 2013-01-29 17:47 ` Ramana Radhakrishnan
0 siblings, 0 replies; 11+ messages in thread
From: Ramana Radhakrishnan @ 2013-01-29 17:47 UTC (permalink / raw)
To: Greta Yorsh; +Cc: GCC Patches, Richard Earnshaw, nickc, paul
On 01/25/13 18:22, Greta Yorsh wrote:
> This patch updates the description of vmul, vdiv, vsqrt, vmla,vmls, vfma,
> vfms operations for vfp and neon. It uses ffmas and ffmad type attribute
> introduced by the previous patch.
>
> gcc/
>
> 2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
>
> * config/arm/cortex-a7.md (cortex_a7_neon_mul, cortex_a7_neon_mla):
> New
> reservations.
> (cortex_a7_fpfmad): New reservation.
> (cortex_a7_fpmacs): Use ffmas and update required units.
> (cortex_a7_fpmuld): Update required units and latency.
> (cortex_a7_fpmacd): Likewise.
> (cortex_a7_fdivs, cortex_a7_fdivd): Likewise.
> (cortex_a7_neon). Likewise.
> (bypass) Update participating units.
>
Ok as it only touches Cortex-A7 tuning .
Ramana
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH,ARM][4/5] Fix calls in cortex-a7 pipeline description
2013-01-25 18:15 [PATCH,ARM][0/5] Updates to cortex-a7 pipeline description Greta Yorsh
2013-01-25 18:21 ` [PATCH,ARM][1/5] Add ffmas and ffmad type attribute Greta Yorsh
2013-01-25 18:23 ` [PATCH,ARM][2/5] Update cortex-a7 vfp/neon pipeline description Greta Yorsh
@ 2013-01-25 18:25 ` Greta Yorsh
2013-01-29 17:48 ` Ramana Radhakrishnan
2013-01-25 18:25 ` [PATCH,ARM][3/5] New bypass between mac operations " Greta Yorsh
2013-01-25 18:26 ` [PATCH,ARM][5/5] Cleanup " Greta Yorsh
4 siblings, 1 reply; 11+ messages in thread
From: Greta Yorsh @ 2013-01-25 18:25 UTC (permalink / raw)
To: GCC Patches
Cc: Richard Earnshaw, Ramana Radhakrishnan, nickc, paul, Greta Yorsh
[-- Attachment #1: Type: text/plain, Size: 670 bytes --]
Improve handling of call insns in cortex-a7 pipeline description, as
follows.
A call can dual-issue as a younger instruction but not as an older
instruction (from compiler's point of view). This patch adjusts the function
cortexa7_younger (used by the implementation of TARGET_SCHED_REORDER hook)
to return true for calls. The patch also updates the pipeline description
for calls to allow either dual-issue as a younger instruction or
single-issue.
gcc/
2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.c (cortexa7_younger): Return true for TYPE_CALL.
* config/arm/cortex-a7.md (cortex_a7_call): Update required units.
[-- Attachment #2: 4-call.patch.txt --]
[-- Type: text/plain, Size: 1304 bytes --]
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index ab6c88b..9f61722 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -8746,6 +8746,7 @@ cortexa7_younger (FILE *file, int verbose, rtx insn)
case TYPE_SIMPLE_ALU_IMM:
case TYPE_SIMPLE_ALU_SHIFT:
case TYPE_BRANCH:
+ case TYPE_CALL:
return true;
default:
return false;
--- a/gcc/config/arm/cortex-a7.md 2013-01-03 13:28:19.000000000 +0000
+++ b/gcc/config/arm/cortex-a7.md 2013-01-03 12:33:15.000000000 +0000
@@ -80,12 +80,15 @@
(eq_attr "neon_type" "none")))
"(cortex_a7_ex2|cortex_a7_ex1)+cortex_a7_branch")
-;; A call reserves all issue slots. The result is available the next cycle.
+;; Call cannot dual-issue as an older instruction. It can dual-issue
+;; as a younger instruction, or single-issue. Call cannot dual-issue
+;; with another branch instruction. The result is available the next
+;; cycle.
(define_insn_reservation "cortex_a7_call" 1
(and (eq_attr "tune" "cortexa7")
(and (eq_attr "type" "call")
(eq_attr "neon_type" "none")))
- "cortex_a7_all")
+ "(cortex_a7_ex2|cortex_a7_both)+cortex_a7_branch")
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ALU instructions.
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH,ARM][4/5] Fix calls in cortex-a7 pipeline description
2013-01-25 18:25 ` [PATCH,ARM][4/5] Fix calls in cortex-a7 " Greta Yorsh
@ 2013-01-29 17:48 ` Ramana Radhakrishnan
0 siblings, 0 replies; 11+ messages in thread
From: Ramana Radhakrishnan @ 2013-01-29 17:48 UTC (permalink / raw)
To: Greta Yorsh; +Cc: GCC Patches, Richard Earnshaw, nickc, paul
On 01/25/13 18:24, Greta Yorsh wrote:
> Improve handling of call insns in cortex-a7 pipeline description, as
> follows.
>
> A call can dual-issue as a younger instruction but not as an older
> instruction (from compiler's point of view). This patch adjusts the function
> cortexa7_younger (used by the implementation of TARGET_SCHED_REORDER hook)
> to return true for calls. The patch also updates the pipeline description
> for calls to allow either dual-issue as a younger instruction or
> single-issue.
>
> gcc/
>
> 2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
>
> * config/arm/arm.c (cortexa7_younger): Return true for TYPE_CALL.
> * config/arm/cortex-a7.md (cortex_a7_call): Update required units.
>
Ok.
Ramana
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH,ARM][3/5] New bypass between mac operations in cortex-a7 pipeline description
2013-01-25 18:15 [PATCH,ARM][0/5] Updates to cortex-a7 pipeline description Greta Yorsh
` (2 preceding siblings ...)
2013-01-25 18:25 ` [PATCH,ARM][4/5] Fix calls in cortex-a7 " Greta Yorsh
@ 2013-01-25 18:25 ` Greta Yorsh
2013-01-29 17:47 ` Ramana Radhakrishnan
2013-01-25 18:26 ` [PATCH,ARM][5/5] Cleanup " Greta Yorsh
4 siblings, 1 reply; 11+ messages in thread
From: Greta Yorsh @ 2013-01-25 18:25 UTC (permalink / raw)
To: GCC Patches
Cc: Richard Earnshaw, Ramana Radhakrishnan, nickc, paul, Greta Yorsh
[-- Attachment #1: Type: text/plain, Size: 974 bytes --]
Add bypasses to forward the result of one MAC operation to the accumulator
of another MAC operation.
Towards this end, we add a new function arm_mac_accumulator_is_result to be
used as a guard for bypasses. Existing guard
arm_mac_accumulator_is_mul_result requires a multiply operation as the
producer and a multiply-accumulate operation as the consumer. The new guard
allows more general producers and consumers. It allows the consumer to be a
multiply-accumulate or multiply-subtract operation. It allows the producer
to be any SET operation, although only MAC operations are used as producers
in the pipeline description of Cortex-A7.
gcc/
2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm-protos.h (arm_mac_accumulator_is_result): New
declaration.
* config/arm/arm.c (arm_mac_accumulator_is_result): New function.
* config/arm/cortex-a7.md: New bypasses using
arm_mac_accumulator_is_result.
[-- Attachment #2: 3-mac-forward-path.v2.patch.txt --]
[-- Type: text/plain, Size: 4335 bytes --]
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 4c61e35..885ccff 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -102,6 +102,7 @@ extern int arm_early_load_addr_dep (rtx, rtx);
extern int arm_no_early_alu_shift_dep (rtx, rtx);
extern int arm_no_early_alu_shift_value_dep (rtx, rtx);
extern int arm_no_early_mul_dep (rtx, rtx);
+extern int arm_mac_accumulator_is_result (rtx, rtx);
extern int arm_mac_accumulator_is_mul_result (rtx, rtx);
extern int tls_mentioned_p (rtx);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 13d745f..39f1eb3 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -24610,6 +24610,62 @@ arm_cxx_guard_type (void)
return TARGET_AAPCS_BASED ? integer_type_node : long_long_integer_type_node;
}
+/* Return non-zero iff the consumer (a multiply-accumulate or a
+ multiple-subtract instruction) has an accumulator dependency on the
+ result of the producer and no other dependency on that result. It
+ does not check if the producer is multiply-accumulate instruction. */
+int
+arm_mac_accumulator_is_result (rtx producer, rtx consumer)
+{
+ rtx result;
+ rtx op0, op1, acc;
+
+ producer = PATTERN (producer);
+ consumer = PATTERN (consumer);
+
+ if (GET_CODE (producer) == COND_EXEC)
+ producer = COND_EXEC_CODE (producer);
+ if (GET_CODE (consumer) == COND_EXEC)
+ consumer = COND_EXEC_CODE (consumer);
+
+ if (GET_CODE (producer) != SET)
+ return 0;
+
+ result = XEXP (producer, 0);
+
+ if (GET_CODE (consumer) != SET)
+ return 0;
+
+ /* Check that the consumer is of the form
+ (set (...) (plus (mult ...) (...)))
+ or
+ (set (...) (minus (...) (mult ...))). */
+ if (GET_CODE (XEXP (consumer, 1)) == PLUS)
+ {
+ if (GET_CODE (XEXP (XEXP (consumer, 1), 0)) != MULT)
+ return 0;
+
+ op0 = XEXP (XEXP (XEXP (consumer, 1), 0), 0);
+ op1 = XEXP (XEXP (XEXP (consumer, 1), 0), 1);
+ acc = XEXP (XEXP (consumer, 1), 1);
+ }
+ else if (GET_CODE (XEXP (consumer, 1)) == MINUS)
+ {
+ if (GET_CODE (XEXP (XEXP (consumer, 1), 1)) != MULT)
+ return 0;
+
+ op0 = XEXP (XEXP (XEXP (consumer, 1), 1), 0);
+ op1 = XEXP (XEXP (XEXP (consumer, 1), 1), 1);
+ acc = XEXP (XEXP (consumer, 1), 0);
+ }
+ else
+ return 0;
+
+ return (reg_overlap_mentioned_p (result, acc)
+ && !reg_overlap_mentioned_p (result, op0)
+ && !reg_overlap_mentioned_p (result, op1));
+}
+
/* Return non-zero if the consumer (a multiply-accumulate instruction)
has an accumulator dependency on the result of the producer (a
multiplication instruction) and no other dependency on that result. */
diff --git a/gcc/config/arm/cortex-a7.md b/gcc/config/arm/cortex-a7.md
index 930242d..2cef5fd 100644
--- a/gcc/config/arm/cortex-a7.md
+++ b/gcc/config/arm/cortex-a7.md
@@ -137,6 +137,12 @@
(eq_attr "neon_type" "none")))
"cortex_a7_both")
+;; Forward the result of a multiply operation to the accumulator
+;; of the following multiply and accumulate instruction.
+(define_bypass 1 "cortex_a7_mul"
+ "cortex_a7_mul"
+ "arm_mac_accumulator_is_result")
+
;; The latency depends on the operands, so we use an estimate here.
(define_insn_reservation "cortex_a7_idiv" 5
(and (eq_attr "tune" "cortexa7")
@@ -264,6 +271,10 @@
neon_fp_vmla_qqq_scalar"))
"cortex_a7_both+cortex_a7_fpmul_pipe")
+(define_bypass 4 "cortex_a7_fpmacs,cortex_a7_neon_mla"
+ "cortex_a7_fpmacs,cortex_a7_neon_mla"
+ "arm_mac_accumulator_is_result")
+
;; Non-multiply instructions can issue between two cycles of a
;; double-precision multiply.
@@ -285,6 +296,10 @@
(eq_attr "neon_type" "none")))
"cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*4")
+(define_bypass 7 "cortex_a7_fpmacd"
+ "cortex_a7_fpmacd,cortex_a7_fpfmad"
+ "arm_mac_accumulator_is_result")
+
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Floating-point divide/square root instructions.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH,ARM][3/5] New bypass between mac operations in cortex-a7 pipeline description
2013-01-25 18:25 ` [PATCH,ARM][3/5] New bypass between mac operations " Greta Yorsh
@ 2013-01-29 17:47 ` Ramana Radhakrishnan
0 siblings, 0 replies; 11+ messages in thread
From: Ramana Radhakrishnan @ 2013-01-29 17:47 UTC (permalink / raw)
To: Greta Yorsh; +Cc: GCC Patches, Richard Earnshaw, nickc, paul
On 01/25/13 18:23, Greta Yorsh wrote:
> Add bypasses to forward the result of one MAC operation to the accumulator
> of another MAC operation.
>
> Towards this end, we add a new function arm_mac_accumulator_is_result to be
> used as a guard for bypasses. Existing guard
> arm_mac_accumulator_is_mul_result requires a multiply operation as the
> producer and a multiply-accumulate operation as the consumer. The new guard
> allows more general producers and consumers. It allows the consumer to be a
> multiply-accumulate or multiply-subtract operation. It allows the producer
> to be any SET operation, although only MAC operations are used as producers
> in the pipeline description of Cortex-A7.
>
> gcc/
>
> 2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
>
> * config/arm/arm-protos.h (arm_mac_accumulator_is_result): New
> declaration.
> * config/arm/arm.c (arm_mac_accumulator_is_result): New function.
> * config/arm/cortex-a7.md: New bypasses using
> arm_mac_accumulator_is_result.
>
Ok as it only affects Cortex-A7.
Ramana
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH,ARM][5/5] Cleanup in cortex-a7 pipeline description
2013-01-25 18:15 [PATCH,ARM][0/5] Updates to cortex-a7 pipeline description Greta Yorsh
` (3 preceding siblings ...)
2013-01-25 18:25 ` [PATCH,ARM][3/5] New bypass between mac operations " Greta Yorsh
@ 2013-01-25 18:26 ` Greta Yorsh
2013-01-29 17:48 ` Ramana Radhakrishnan
4 siblings, 1 reply; 11+ messages in thread
From: Greta Yorsh @ 2013-01-25 18:26 UTC (permalink / raw)
To: GCC Patches
Cc: Richard Earnshaw, Ramana Radhakrishnan, nickc, paul, Greta Yorsh
[-- Attachment #1: Type: text/plain, Size: 460 bytes --]
In cortex_a7_idiv, the use of cortex_a7_all reservation can be replaced by
cortex_a7_both, because all other reservations require at least one of
cortex_a7_ex1 or cortex_a7_ex2. Then, remove unused reservation units
cortex_a7_neon and cortex_a7_all.
gcc/
2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/cortex-a7.md (cortex_a7_neon, cortex_a7_all): Remove.
(cortex_a7_idiv): Use cortex_a7_both instead of cortex_a7_all.
[-- Attachment #2: 5-cleanup.patch.txt --]
[-- Type: text/plain, Size: 1091 bytes --]
diff --git a/gcc/config/arm/cortex-a7.md b/gcc/config/arm/cortex-a7.md
index 8c45cb8..21f84b5 100644
--- a/gcc/config/arm/cortex-a7.md
+++ b/gcc/config/arm/cortex-a7.md
@@ -57,15 +57,6 @@
(define_cpu_unit "cortex_a7_fp_div_sqrt" "cortex_a7")
-;; Neon pipeline
-(define_cpu_unit "cortex_a7_neon" "cortex_a7")
-
-(define_reservation "cortex_a7_all" "cortex_a7_both+\
- cortex_a7_fpmul_pipe+\
- cortex_a7_fpadd_pipe+\
- cortex_a7_fp_div_sqrt+\
- cortex_a7_neon")
-
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Branches.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -151,7 +142,7 @@
(define_insn_reservation "cortex_a7_idiv" 5
(and (eq_attr "tune" "cortexa7")
(eq_attr "insn" "udiv,sdiv"))
- "cortex_a7_all*5")
+ "cortex_a7_both*5")
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Load/store instructions.
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH,ARM][5/5] Cleanup in cortex-a7 pipeline description
2013-01-25 18:26 ` [PATCH,ARM][5/5] Cleanup " Greta Yorsh
@ 2013-01-29 17:48 ` Ramana Radhakrishnan
0 siblings, 0 replies; 11+ messages in thread
From: Ramana Radhakrishnan @ 2013-01-29 17:48 UTC (permalink / raw)
To: Greta Yorsh; +Cc: GCC Patches, Richard Earnshaw, nickc, paul
On 01/25/13 18:25, Greta Yorsh wrote:
> In cortex_a7_idiv, the use of cortex_a7_all reservation can be replaced by
> cortex_a7_both, because all other reservations require at least one of
> cortex_a7_ex1 or cortex_a7_ex2. Then, remove unused reservation units
> cortex_a7_neon and cortex_a7_all.
>
> gcc/
>
> 2013-01-03 Greta Yorsh <Greta.Yorsh@arm.com>
>
> * config/arm/cortex-a7.md (cortex_a7_neon, cortex_a7_all): Remove.
> (cortex_a7_idiv): Use cortex_a7_both instead of cortex_a7_all.
>
Ok for the same reason as others given they only touch A7 pipeline
descriptions.
Ramana
^ permalink raw reply [flat|nested] 11+ messages in thread