From: "Greta Yorsh" <greta.yorsh@arm.com>
To: "Greta Yorsh" <Greta.Yorsh@arm.com>,
"GCC Patches" <gcc-patches@gcc.gnu.org>
Cc: "Richard Earnshaw" <Richard.Earnshaw@arm.com>,
"Ramana Radhakrishnan" <Ramana.Radhakrishnan@arm.com>,
<nickc@redhat.com>, <paul@codesourcery.com>
Subject: [PATCH,ARM][6/n] Split min and max patterns
Date: Mon, 18 Feb 2013 18:45:00 -0000 [thread overview]
Message-ID: <002701ce0e08$0bebc0d0$23c34270$@yorsh@arm.com> (raw)
In-Reply-To: <001101ce0e05$f5928a50$e0b79ef0$@yorsh@arm.com>
[-- Attachment #1: Type: text/plain, Size: 406 bytes --]
Convert define_insn into define_insn_and_split for various min and max
patterns that output multiple assembly instructions. Use movsicc to emit
RTL. A separate patch will split movsicc.
gcc/
2013-02-14 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.md (arm_smax_insn): Convert define_insn into
define_insn_and_split.
(arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise.
[-- Attachment #2: 6-split-min-max.v4.patch.txt --]
[-- Type: text/plain, Size: 4049 bytes --]
commit 068f9449536fca959fd687ac8b7e0bdae898f8bd
Author: Greta <Greta.Yorsh@arm.com>
Date: Fri Feb 15 14:41:48 2013 +0000
8-split-min-max.v2.patch
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 7c04840..5f5af3c 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3443,15 +3443,23 @@
[(set_attr "predicable" "yes")]
)
-(define_insn "*arm_smax_insn"
+(define_insn_and_split "*arm_smax_insn"
[(set (match_operand:SI 0 "s_register_operand" "=r,r")
(smax:SI (match_operand:SI 1 "s_register_operand" "%0,?r")
(match_operand:SI 2 "arm_rhs_operand" "rI,rI")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
- "@
- cmp\\t%1, %2\;movlt\\t%0, %2
- cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2"
+ "#"
+ ; cmp\\t%1, %2\;movlt\\t%0, %2
+ ; cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2"
+ "TARGET_ARM"
+ [(set (reg:CC CC_REGNUM)
+ (compare:CC (match_dup 1) (match_dup 2)))
+ (set (match_dup 0)
+ (if_then_else:SI (ge:SI (reg:CC CC_REGNUM) (const_int 0))
+ (match_dup 1)
+ (match_dup 2)))]
+ ""
[(set_attr "conds" "clob")
(set_attr "length" "8,12")]
)
@@ -3483,15 +3491,23 @@
[(set_attr "predicable" "yes")]
)
-(define_insn "*arm_smin_insn"
+(define_insn_and_split "*arm_smin_insn"
[(set (match_operand:SI 0 "s_register_operand" "=r,r")
(smin:SI (match_operand:SI 1 "s_register_operand" "%0,?r")
(match_operand:SI 2 "arm_rhs_operand" "rI,rI")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
- "@
- cmp\\t%1, %2\;movge\\t%0, %2
- cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2"
+ "#"
+ ; cmp\\t%1, %2\;movge\\t%0, %2
+ ; cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2"
+ "TARGET_ARM"
+ [(set (reg:CC CC_REGNUM)
+ (compare:CC (match_dup 1) (match_dup 2)))
+ (set (match_dup 0)
+ (if_then_else:SI (lt:SI (reg:CC CC_REGNUM) (const_int 0))
+ (match_dup 1)
+ (match_dup 2)))]
+ ""
[(set_attr "conds" "clob")
(set_attr "length" "8,12")]
)
@@ -3506,16 +3522,24 @@
""
)
-(define_insn "*arm_umaxsi3"
+(define_insn_and_split "*arm_umaxsi3"
[(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
(umax:SI (match_operand:SI 1 "s_register_operand" "0,r,?r")
(match_operand:SI 2 "arm_rhs_operand" "rI,0,rI")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
- "@
- cmp\\t%1, %2\;movcc\\t%0, %2
- cmp\\t%1, %2\;movcs\\t%0, %1
- cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2"
+ "#"
+ ; cmp\\t%1, %2\;movcc\\t%0, %2
+ ; cmp\\t%1, %2\;movcs\\t%0, %1
+ ; cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2"
+ "TARGET_ARM"
+ [(set (reg:CC CC_REGNUM)
+ (compare:CC (match_dup 1) (match_dup 2)))
+ (set (match_dup 0)
+ (if_then_else:SI (geu:SI (reg:CC CC_REGNUM) (const_int 0))
+ (match_dup 1)
+ (match_dup 2)))]
+ ""
[(set_attr "conds" "clob")
(set_attr "length" "8,8,12")]
)
@@ -3530,16 +3554,24 @@
""
)
-(define_insn "*arm_uminsi3"
+(define_insn_and_split "*arm_uminsi3"
[(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
(umin:SI (match_operand:SI 1 "s_register_operand" "0,r,?r")
(match_operand:SI 2 "arm_rhs_operand" "rI,0,rI")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
- "@
- cmp\\t%1, %2\;movcs\\t%0, %2
- cmp\\t%1, %2\;movcc\\t%0, %1
- cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2"
+ "#"
+ ; cmp\\t%1, %2\;movcs\\t%0, %2
+ ; cmp\\t%1, %2\;movcc\\t%0, %1
+ ; cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2"
+ "TARGET_ARM"
+ [(set (reg:CC CC_REGNUM)
+ (compare:CC (match_dup 1) (match_dup 2)))
+ (set (match_dup 0)
+ (if_then_else:SI (ltu:SI (reg:CC CC_REGNUM) (const_int 0))
+ (match_dup 1)
+ (match_dup 2)))]
+ ""
[(set_attr "conds" "clob")
(set_attr "length" "8,8,12")]
)
next prev parent reply other threads:[~2013-02-18 18:45 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-18 18:30 [PATCH, ARM][0/n] Split patterns that output multiple assembly instruction Greta Yorsh
2013-02-18 18:35 ` [PATCH,ARM][1/n] New patterns for subtract with carry Greta Yorsh
2013-02-22 16:29 ` Richard Earnshaw
[not found] ` <B393A6715F47FC43935D96EA15105EFF3F95D287B4@GEORGE.Emea.Arm.com>
2013-04-05 18:59 ` Ramana Radhakrishnan
2013-02-18 18:37 ` [PATCH,ARM][2/n] Split subdi patterns Greta Yorsh
2013-02-22 16:33 ` Richard Earnshaw
2013-02-18 18:39 ` [PATCH,ARM][3/n] Split various patterns Greta Yorsh
2013-04-09 18:13 ` Richard Earnshaw
2013-02-18 18:41 ` [PATCH,ARM][4/n] Add negdi_extend patterns Greta Yorsh
2013-02-18 18:43 ` [PATCH,ARM][5/n] Split shift di patterns Greta Yorsh
2013-02-18 18:45 ` Greta Yorsh [this message]
2013-04-09 18:02 ` [PATCH,ARM][6/n] Split min and max patterns Richard Earnshaw
2013-02-18 18:46 ` [PATCH, ARM][7/n] Comment on splitting THUMB1 patterns Greta Yorsh
[not found] <512276c3.4256420a.1fef.ffffb1d3SMTPIN_ADDED_BROKEN@mx.google.com>
2013-03-26 14:41 ` [PATCH,ARM][6/n] Split min and max patterns Ramana Radhakrishnan
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