* [PATCH] AArch64: Improve regmove_costs for 128-bit types
@ 2014-09-15 14:48 Wilco Dijkstra
2014-09-23 10:52 ` Marcus Shawcroft
0 siblings, 1 reply; 4+ messages in thread
From: Wilco Dijkstra @ 2014-09-15 14:48 UTC (permalink / raw)
To: gcc-patches
Hi,
This patch improves the register move costs for 128-bit types.
OK for commit?
ChangeLog:
2014-09-15 Wilco Dijkstra <wdijkstr@arm.com>
* gcc/config/aarch64/aarch64.c (aarch64_register_move_cost):
Add register move costs for 128-bit types.
---
gcc/config/aarch64/aarch64.c | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 51e2c70..b032e93 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -5950,6 +5950,27 @@ aarch64_register_move_cost (enum machine_mode mode,
return aarch64_register_move_cost (mode, from, GENERAL_REGS)
+ aarch64_register_move_cost (mode, GENERAL_REGS, to);
+ if (GET_MODE_SIZE (mode) == 16)
+ {
+ /* 128-bit operations on general registers require 2 instructions. */
+ if (from == GENERAL_REGS && to == GENERAL_REGS)
+ return regmove_cost->GP2GP * 2;
+ else if (from == GENERAL_REGS)
+ return regmove_cost->GP2FP * 2;
+ else if (to == GENERAL_REGS)
+ return regmove_cost->FP2GP * 2;
+
+ /* When AdvSIMD instructions are disabled it is not possible to move
+ a 128-bit value directly between Q registers. This is handled in
+ secondary reload. A general register is used as a scratch to move
+ the upper DI value and the lower DI value is moved directly,
+ hence the cost is the sum of three moves. */
+ if (! TARGET_SIMD)
+ return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP;
+
+ return regmove_cost->FP2FP;
+ }
+
if (from == GENERAL_REGS && to == GENERAL_REGS)
return regmove_cost->GP2GP;
else if (from == GENERAL_REGS)
@@ -5957,14 +5978,6 @@ aarch64_register_move_cost (enum machine_mode mode,
else if (to == GENERAL_REGS)
return regmove_cost->FP2GP;
- /* When AdvSIMD instructions are disabled it is not possible to move
- a 128-bit value directly between Q registers. This is handled in
- secondary reload. A general register is used as a scratch to move
- the upper DI value and the lower DI value is moved directly,
- hence the cost is the sum of three moves. */
- if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 16)
- return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP;
-
return regmove_cost->FP2FP;
}
--
1.9.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] AArch64: Improve regmove_costs for 128-bit types
2014-09-15 14:48 [PATCH] AArch64: Improve regmove_costs for 128-bit types Wilco Dijkstra
@ 2014-09-23 10:52 ` Marcus Shawcroft
2014-09-24 17:18 ` Wilco Dijkstra
0 siblings, 1 reply; 4+ messages in thread
From: Marcus Shawcroft @ 2014-09-23 10:52 UTC (permalink / raw)
To: Wilco Dijkstra; +Cc: gcc-patches
On 15 September 2014 15:48, Wilco Dijkstra <wdijkstr@arm.com> wrote:
> Hi,
>
> This patch improves the register move costs for 128-bit types.
>
> OK for commit?
>
> ChangeLog:
> 2014-09-15 Wilco Dijkstra <wdijkstr@arm.com>
>
> * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost):
> Add register move costs for 128-bit types.
OK. I tried to apply the patch for you, but the inline version has
been munged by the email system. Re-send it as an attachment if you
need me to commit it for you.
/Marcus
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] AArch64: Improve regmove_costs for 128-bit types
2014-09-23 10:52 ` Marcus Shawcroft
@ 2014-09-24 17:18 ` Wilco Dijkstra
2014-09-24 18:24 ` [COMMITTED][PATCH] " Jiong Wang
0 siblings, 1 reply; 4+ messages in thread
From: Wilco Dijkstra @ 2014-09-24 17:18 UTC (permalink / raw)
To: Jiong Wang; +Cc: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 891 bytes --]
Attached. Jiong, can you commit this for me please?
> -----Original Message-----
> From: Marcus Shawcroft [mailto:marcus.shawcroft@gmail.com]
> Sent: 23 September 2014 11:52
> To: Wilco Dijkstra
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] AArch64: Improve regmove_costs for 128-bit types
>
> On 15 September 2014 15:48, Wilco Dijkstra <wdijkstr@arm.com> wrote:
> > Hi,
> >
> > This patch improves the register move costs for 128-bit types.
> >
> > OK for commit?
> >
> > ChangeLog:
> > 2014-09-15 Wilco Dijkstra <wdijkstr@arm.com>
> >
> > * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost):
> > Add register move costs for 128-bit types.
>
> OK. I tried to apply the patch for you, but the inline version has
> been munged by the email system. Re-send it as an attachment if you
> need me to commit it for you.
>
> /Marcus
[-- Attachment #2: Improve-128-bit-costs.txt --]
[-- Type: text/plain, Size: 2157 bytes --]
---
gcc/config/aarch64/aarch64.c | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 15c7be6..826ee38 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -5966,6 +5966,27 @@ aarch64_register_move_cost (enum machine_mode mode,
return aarch64_register_move_cost (mode, from, GENERAL_REGS)
+ aarch64_register_move_cost (mode, GENERAL_REGS, to);
+ if (GET_MODE_SIZE (mode) == 16)
+ {
+ /* 128-bit operations on general registers require 2 instructions. */
+ if (from == GENERAL_REGS && to == GENERAL_REGS)
+ return regmove_cost->GP2GP * 2;
+ else if (from == GENERAL_REGS)
+ return regmove_cost->GP2FP * 2;
+ else if (to == GENERAL_REGS)
+ return regmove_cost->FP2GP * 2;
+
+ /* When AdvSIMD instructions are disabled it is not possible to move
+ a 128-bit value directly between Q registers. This is handled in
+ secondary reload. A general register is used as a scratch to move
+ the upper DI value and the lower DI value is moved directly,
+ hence the cost is the sum of three moves. */
+ if (! TARGET_SIMD)
+ return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP;
+
+ return regmove_cost->FP2FP;
+ }
+
if (from == GENERAL_REGS && to == GENERAL_REGS)
return regmove_cost->GP2GP;
else if (from == GENERAL_REGS)
@@ -5973,14 +5994,6 @@ aarch64_register_move_cost (enum machine_mode mode,
else if (to == GENERAL_REGS)
return regmove_cost->FP2GP;
- /* When AdvSIMD instructions are disabled it is not possible to move
- a 128-bit value directly between Q registers. This is handled in
- secondary reload. A general register is used as a scratch to move
- the upper DI value and the lower DI value is moved directly,
- hence the cost is the sum of three moves. */
- if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 16)
- return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP;
-
return regmove_cost->FP2FP;
}
--
1.9.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [COMMITTED][PATCH] AArch64: Improve regmove_costs for 128-bit types
2014-09-24 17:18 ` Wilco Dijkstra
@ 2014-09-24 18:24 ` Jiong Wang
0 siblings, 0 replies; 4+ messages in thread
From: Jiong Wang @ 2014-09-24 18:24 UTC (permalink / raw)
To: Wilco Dijkstra; +Cc: gcc-patches
On 24/09/14 18:18, Wilco Dijkstra wrote:
> Attached. Jiong, can you commit this for me please?
committed as 215562 after pass of aarch64 cross build.
>
>> -----Original Message-----
>> From: Marcus Shawcroft [mailto:marcus.shawcroft@gmail.com]
>> Sent: 23 September 2014 11:52
>> To: Wilco Dijkstra
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: [PATCH] AArch64: Improve regmove_costs for 128-bit types
>>
>> On 15 September 2014 15:48, Wilco Dijkstra <wdijkstr@arm.com> wrote:
>>> Hi,
>>>
>>> This patch improves the register move costs for 128-bit types.
>>>
>>> OK for commit?
>>>
>>> ChangeLog:
>>> 2014-09-15 Wilco Dijkstra <wdijkstr@arm.com>
>>>
>>> * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost):
>>> Add register move costs for 128-bit types.
>> OK. I tried to apply the patch for you, but the inline version has
>> been munged by the email system. Re-send it as an attachment if you
>> need me to commit it for you.
>>
>> /Marcus
^ permalink raw reply [flat|nested] 4+ messages in thread
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2014-09-15 14:48 [PATCH] AArch64: Improve regmove_costs for 128-bit types Wilco Dijkstra
2014-09-23 10:52 ` Marcus Shawcroft
2014-09-24 17:18 ` Wilco Dijkstra
2014-09-24 18:24 ` [COMMITTED][PATCH] " Jiong Wang
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