Hi, Big code size regression is introduced by register renaming pass on thumb2 instruction set. The root cause comprises two aspects: 1. The pass renames LO_REGS into high registers, changing 2 bytes instructions into 4 bytes. This is because function find_best_rename_reg does not forbid renaming LO_REGS into high register. 2. The pass renames two operands instructions into three operand ones, changing 2 bytes instructions into 4 bytes. Though renaming pass has already taken two operands instructions into account, it needs matching constraint alternatives for such instructions provided by backend, which are missed in arm.md. Instruction patterns affected are as listed below: arm_addsi3 arm_subsi3_insn arm_mulsi3_v6 arm_andsi3_insn andsi_notsi_si iorsi3_insn arm_shiftsi3 This patch fixes the problems: 1. Change find_best_rename_reg function. If PREFERRED_CLASS is defined as register class other than NO_REGS: we don't rename old_reg into non-preferred register if old_reg is in PREFERRED_CLASS; otherwise we rename old_reg into preferred register whenever possible, and only after that we try to rename it into other registers. Also the loop is reduced into one pass as a side-effect. 2. Add matching operand alternatives for mentioned patterns in arm.md. With this patch, code size of CSiBE built with "-mthumb -mcpu=cortex-m3 -Os -frename-registers" improved by 0.8% on trunk and now it is better than register renaming disabled. I tested the patches on cortex-m3 with and without register renaming, and on x86 with register renaming. I will apply this patch into ARM Embedded-4_7-branch and commit it to TRUNK after approval. Thanks. 2012-11-30 Bin Cheng * config/arm/arm-cores.def (cortex-m3, cortex-m4): Use v7m. * config/arm/arm-protos.h (tune_params): Add preferred_renaming_class. * config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune) (arm_strongarm_tune, arm_xscale_tune, arm_9e_tune, arm_v6t2_tune) (arm_cortex_tune, arm_cortex_a15_tune, arm_cortex_a5_tune) (arm_cortex_a9_tune, arm_v6m_tune, arm_fa726te_tune): Set preferred_renaming_class field. (arm_v7m_tune): New. (arm_preferred_rename_class): Return preferred renaming register class. * config/arm/arm.md (*arm_addsi3, *arm_subsi3_insn, *arm_mulsi3_v6) (*arm_andsi3_insn, andsi_notsi_si, *iorsi3_insn, *arm_xorsi3) (*arm_shiftsi3): Add alternatives for Thumb2 set. * regrename.c (find_best_rename_reg): Don't rename preferred register to non-preferred register.