From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8388 invoked by alias); 29 Sep 2014 01:15:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 8319 invoked by uid 89); 29 Sep 2014 01:15:30 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 29 Sep 2014 01:15:27 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Mon, 29 Sep 2014 02:15:24 +0100 Received: from SHAWIN202 ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 29 Sep 2014 02:15:22 +0100 From: "Thomas Preud'homme" To: Cc: "Richard Earnshaw" , "Ramana Radhakrishnan" Subject: RE: [PATCH][ARM] Fix -fcall-saved-rX for X > 7 with -Os -mthumb Date: Mon, 29 Sep 2014 01:15:00 -0000 Message-ID: <003201cfdb82$8d041480$a70c3d80$@arm.com> MIME-Version: 1.0 X-MC-Unique: 114092902152400201 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2014-09/txt/msg02494.txt.bz2 Ping? > -----Original Message----- > From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches- > owner@gcc.gnu.org] On Behalf Of Thomas Preud'homme > Sent: Wednesday, August 20, 2014 9:28 AM > To: gcc-patches@gcc.gnu.org > Subject: [PATCH][ARM] Fix -fcall-saved-rX for X > 7 >=20 > This patch makes -fcall-saved-rX for X > 7 on Thumb target when > optimizing for size. It works by adding a new field > x_user_set_call_save_regs in struct target_hard_regs to track whether > an entry in fields x_fixed_regs, x_call_used_regs and > x_call_really_used_regs was user set or is in its default value. Then it = can > decide whether to set a given high register as caller saved or not when > optimizing for size based on this information. >=20 > ChangeLog are as follows: >=20 > *** gcc/ChangeLog *** >=20 > 2014-08-15 Thomas Preud'homme >=20 > * config/arm/arm.c (arm_conditional_register_usage): Only set high > registers as caller saved when optimizing for size *and* the user= did > not asked otherwise through -fcall-saved-* switch. > * hard-reg-set.h (x_user_set_call_save_regs): New. > (user_set_call_save_regs): Define. > * reginfo.c (init_reg_sets): Initialize user_set_call_save_regs. > (fix_register): Indicate in user_set_call_save_regs that the valu= e set > in call_save_regs and fixed_regs is user set. >=20 >=20 > *** gcc/testsuite/ChangeLog *** >=20 > 2014-08-15 Thomas Preud'homme >=20 > * gcc.target/arm/fcall-save-rhigh.c: New. >=20 >=20 > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index 2f8d327..8324fa3 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -30084,7 +30084,8 @@ arm_conditional_register_usage (void) > stacking them. */ > for (regno =3D FIRST_HI_REGNUM; > regno <=3D LAST_HI_REGNUM; ++regno) > - fixed_regs[regno] =3D call_used_regs[regno] =3D 1; > + if (!user_set_call_save_regs[regno]) > + fixed_regs[regno] =3D call_used_regs[regno] =3D 1; > } >=20 > /* The link register can be clobbered by any branch insn, > diff --git a/gcc/hard-reg-set.h b/gcc/hard-reg-set.h > index b8ab3df..b523637 100644 > --- a/gcc/hard-reg-set.h > +++ b/gcc/hard-reg-set.h > @@ -614,6 +614,11 @@ struct target_hard_regs { >=20 > char x_call_really_used_regs[FIRST_PSEUDO_REGISTER]; >=20 > + /* Indexed by hard register number, contains 1 for registers > + whose saving at function call was decided by the user > + with -fcall-saved-*, -fcall-used-* or -ffixed-*. */ > + char x_user_set_call_save_regs[FIRST_PSEUDO_REGISTER]; > + > /* The same info as a HARD_REG_SET. */ > HARD_REG_SET x_call_used_reg_set; >=20 > @@ -685,6 +690,8 @@ extern struct target_hard_regs > *this_target_hard_regs; > (this_target_hard_regs->x_call_used_regs) > #define call_really_used_regs \ > (this_target_hard_regs->x_call_really_used_regs) > +#define user_set_call_save_regs \ > + (this_target_hard_regs->x_user_set_call_save_regs) > #define call_used_reg_set \ > (this_target_hard_regs->x_call_used_reg_set) > #define call_fixed_reg_set \ > diff --git a/gcc/reginfo.c b/gcc/reginfo.c > index 7668be0..0b35f7f 100644 > --- a/gcc/reginfo.c > +++ b/gcc/reginfo.c > @@ -183,6 +183,7 @@ init_reg_sets (void) > memcpy (call_really_used_regs, initial_call_really_used_regs, > sizeof call_really_used_regs); > #endif > + memset (user_set_call_save_regs, 0, sizeof user_set_call_save_regs); > #ifdef REG_ALLOC_ORDER > memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof > reg_alloc_order); > #endif > @@ -742,6 +743,7 @@ fix_register (const char *name, int fixed, int > call_used) > if (fixed =3D=3D 0) > call_really_used_regs[i] =3D call_used; > #endif > + user_set_call_save_regs[i] =3D 1; > } > } > } > diff --git a/gcc/testsuite/gcc.target/arm/fcall-save-rhigh.c > b/gcc/testsuite/gcc.target/arm/fcall-save-rhigh.c > new file mode 100644 > index 0000000..a321a2b > --- /dev/null > +++ b/gcc/testsuite/gcc.target/arm/fcall-save-rhigh.c > @@ -0,0 +1,10 @@ > +/* { dg-do compile } */ > +/* { dg-final { scan-assembler "mov\\s+r.\\s*,\\s*r8" } } */ > +/* { dg-require-effective-target arm_thumb1_ok } */ > +/* { dg-options "-Os -mthumb -mcpu=3Dcortex-m0 -fcall-saved-r8" } */ > + > +void > +save_regs (void) > +{ > + asm volatile ("" ::: "r7", "r8"); > +} >=20 > Ok for trunk? >=20 > Best regards, >=20 > Thomas >=20 >=20