[x86 PATCH] Fix libitm.c/memset-1.c test fails with new peephole2s.

["Roger Sayle" <roger@nextmovesoftware.com>]

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My sincere apologies for the breakage, but alas handling SImode in the
recently added "xorl;movb -> movzbl" peephole2 turns out to be slightly
more complicated that just using SWI48 as a mode iterator.  I'd failed
to check the machine description carefully, but the *zero_extend<mode>si2
define_insn is conditionally defined, based on x86 target tuning using
TARGET_ZERO_EXTEND_WITH_AND, and therefore unavailable on 486 and pentium
unless optimizing the code for size.  It turns out that the libitm testsuite
specifies -m486 with make check RUNTESTFLAGS="--target_board='unix{-m32}'"
and therefore encounters/catches my oversight.

Fixed by adding the appropriate conditions to the new peephole2 patterns.
It don't think it's worth the effort to provide an equivalent optimization
for
these (very) old architectures.

Tested on x86_64-pc-linux-gnu with make bootstrap and make -k check
with no new failures.  Confirmed using RUNTESTFLAGS that this
fixes the above failure, and the recently added testcase with -march=i486.
Ok for mainline?


2022-03-12  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	* config/i386/i386.md (peephole2 xorl;movb -> movzbl): Disable
	transformation when *zero_extend<mode>si2 is not available.

gcc/testsuite/ChangeLog
	* gcc.target/i386/pr98335.c: Skip this test if tuning for i486
	or pentium, and not optimizing for size.


Sorry for the noise.
Roger
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diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c8fbf60..80b5974 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -4316,7 +4316,10 @@
 	      (clobber (reg:CC FLAGS_REG))])
    (set (strict_low_part (match_operand:SWI12 1 "general_reg_operand"))
 	(match_operand:SWI12 2 "nonimmediate_operand"))]
-  "REGNO (operands[0]) == REGNO (operands[1])"
+  "REGNO (operands[0]) == REGNO (operands[1])
+   && (<SWI48:MODE_SIZE> != 4
+       || !TARGET_ZERO_EXTEND_WITH_AND
+       || !optimize_function_for_speed_p (cfun))"
   [(set (match_dup 0) (zero_extend:SWI48 (match_dup 2)))])
 
 ;; Likewise, but preserving FLAGS_REG.
@@ -4324,7 +4327,10 @@
   [(set (match_operand:SWI48 0 "general_reg_operand") (const_int 0))
    (set (strict_low_part (match_operand:SWI12 1 "general_reg_operand"))
 	(match_operand:SWI12 2 "nonimmediate_operand"))]
-  "REGNO (operands[0]) == REGNO (operands[1])"
+  "REGNO (operands[0]) == REGNO (operands[1])
+   && (<SWI48:MODE_SIZE> != 4
+       || !TARGET_ZERO_EXTEND_WITH_AND
+       || !optimize_function_for_speed_p (cfun))"
   [(set (match_dup 0) (zero_extend:SWI48 (match_dup 2)))])
 \f
 ;; Sign extension instructions
diff --git a/gcc/testsuite/gcc.target/i386/pr98335.c b/gcc/testsuite/gcc.target/i386/pr98335.c
index 7fa7ad7..bf731b4 100644
--- a/gcc/testsuite/gcc.target/i386/pr98335.c
+++ b/gcc/testsuite/gcc.target/i386/pr98335.c
@@ -1,5 +1,10 @@
 /* { dg-do compile } */
 /* { dg-options "-O2" } */
+/* { dg-skip-if "" { *-*-* } { "-march=i[45]86" } { "-O[sz]" } } */
+/* { dg-skip-if "" { *-*-* } { "-march=pentium" } { "-O[sz]" } } */
+/* { dg-skip-if "" { *-*-* } { "-mtune=i[45]86" } { "-O[sz]" } } */
+/* { dg-skip-if "" { *-*-* } { "-mtune=pentium" } { "-O[sz]" } } */
+
 union Data { char a; short b; };
 
 char c;