This patch to the mips backend updates the representations used
internally for MIPS' wsbh, dsbh and dshd instructions.  These were
previously described using an UNSPEC rtx, which prevents simplification
at the RTL level.  In addition to now being able to eliminate rotate
instructions before/after wsbh, allowing a wsbh to be emitted without
a backend builtin, these new representations also allow dsbh and dshd
to be synthesized from standard C/C++ vector idioms.

This patch has been tested by a make bootstrap and make -k check
on mips-unknown-linux-gnu, with --enable-multiarch --enable-multilib
--enable-targets=all --with-arch-32=mips32r2 --with-arch-64=mips64r2
(thanks to the compile farm's gcc230.fsffrance.org) and a cross-compiler
to mips64-linux-gnu hosted on x86_64-pc-linux-gnu.

Ok for mainline?


2021-12-10  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	* config/mips/mips.c (mips_vector_mode_supported_p): Allow
	V4HI and V8QI modes on TARGET_64BIT with ISA_HAS_WSBH.
	(mips_expand_vec_perm_const_1): With one_vector_p, try
	expanding a vselect directly before an interleaved variant.
	* mips.md (UNSPEC_WSBH, UNSPEC_DSBH, UNSPEC_DSHD): Delete.
	(bswapsi2): Change from define_insn_and_split to an expander.
	(bswapdi2): Change from define_insn_and_split to an expander.
	(wsbh): Represent as SI rotate by 16 of a bswap32.
	(wsbh_2): Also recognize as a bswap32 of a rotatert:SI ... 16.
	(wsbh_v4qi): Recognize wsbh from a vec_select:V4QI.
	(wsbh_v2hi): Recognize wsbh from a vec_select:V2HI.
	(dsbh): Represent as a DImode cast of a vec_select:V8QI.
	(dsbh_v8qi): Recognize dsbh from a vec_select:V8QI.
	(dshd): Represent as a DImode cast of a vec_select:V8QI.
	(dshd_v8qi): Recognize dshd from a vec_select:V8QI.
	(dshd_v4hi): Recognize dshd from a vec_select:V4HI.

gcc/testsuite/ChangeLog
	* gcc.target/mips/dsbh-v8qi.c: New test case.
	* gcc.target/mips/dshd-v4hi.c: New test case.
	* gcc.target/mips/dshd-v8qi.c: New test case.
	* gcc.target/mips/wsbh.c: New test case.


Thanks in advance,
Roger
--