From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9132 invoked by alias); 7 Feb 2013 15:51:42 -0000 Received: (qmail 9102 invoked by uid 22791); 7 Feb 2013 15:51:40 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_SPAMHAUS_DROP,KHOP_THREADED,MSGID_MULTIPLE_AT,RCVD_IN_DNSWL_LOW,TW_FP,TW_VF X-Spam-Check-By: sourceware.org Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 07 Feb 2013 15:51:32 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Thu, 07 Feb 2013 15:51:28 +0000 Received: from e106372vm ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Thu, 7 Feb 2013 15:51:28 +0000 From: "Kyrylo Tkachov" To: Cc: "Ramana Radhakrishnan" , "Richard Earnshaw" References: <002a01cddd24$4c641140$e52c33c0$@tkachov@arm.com> In-Reply-To: <002a01cddd24$4c641140$e52c33c0$@tkachov@arm.com> Subject: RE: [PATCH][ARM][3/3] Add vectorization support for rounding functions Date: Thu, 07 Feb 2013 15:51:00 -0000 Message-ID: <006c01ce054a$f390e080$dab2a180$@tkachov@arm.com> MIME-Version: 1.0 X-MC-Unique: 113020715512802701 Content-Type: multipart/mixed; boundary="----=_NextPart_000_006D_01CE054A.F390E080" X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2013-02/txt/msg00311.txt.bz2 This is a multi-part message in MIME format. ------=_NextPart_000_006D_01CE054A.F390E080 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-length: 2809 Hi all, This testsuite patch has been okayed at http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01141.html but I have not applied it and I'd like to add a couple of things to it. Currently, add_options_for_arm_v8_neon would explicitly set -mfloat-abi=3Dsoftfp which would break check_effective_target_arm_v8_neon_hw for configurations with hard float ABI, thus preventing the execution tests that use this check in gcc.dg/vect from running. This patch fixes that. Ok to put it in with the other two ARM rounding vectorization patches that have been okayed for stage1? Thanks, Kyrill gcc/testuite/ChangeLog 2013-02-07 Kyrylo Tkachov * lib/target-supports.exp (check_effective_target_arm_v8_neon_hw): New procedure. (check_effective_target_arm_v8_neon_ok_nocache): Likewise. (check_effective_target_arm_v8_neon_ok): Change to use check_effective_target_arm_v8_neon_ok_nocache. (add_options_for_arm_v8_neon): Use et_arm_v8_neon_flags to set ARMv8 NEON flags. (check_effective_target_vect_call_btruncf): Enable for arm and ARMv8 NEON. (check_effective_target_vect_call_ceilf): Likewise. (check_effective_target_vect_call_floorf): Likewise. (check_effective_target_vect_call_roundf): Likewise. (check_vect_support_and_set_flags): Handle ARMv8 NEON effective target. > -----Original Message----- > From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches- > owner@gcc.gnu.org] On Behalf Of Kyrylo Tkachov > Sent: 18 December 2012 13:34 > To: gcc-patches@gcc.gnu.org > Cc: Ramana Radhakrishnan; Richard Earnshaw > Subject: [PATCH][ARM][3/3] Add vectorization support for rounding > functions >=20 > Hi all, > This patch adds arm and v8 NEON to the effective target checks that are > used > in the rounding functions vectorisation tests. > A new effective target check for NEON hardware is added This check is > used > to determine > whether to do runtime tests or just compilation. >=20 > With these changes the following tests now PASS on arm instead of being > UNSUPPORTED: > * gcc.dg/vect/vect-rounding-btrunc.c > * gcc.dg/vect/vect-rounding-ceilf.c > * gcc.dg/vect/vect-rounding-floorf.c > * gcc.dg/vect/vect-rounding-roundf.c >=20 > Tested on arm-none-eabi with model and softfp float ABI. >=20 > Ok for trunk? >=20 > Thanks, > Kyrill >=20 > gcc/testuite/ChangeLog >=20 > 2012-12-18 Kyrylo Tkachov >=20 > * lib/target-supports.exp > (check_effective_target_arm_v8_neon_hw): > New procedure. > (check_effective_target_vect_call_btruncf): > Add check for arm and ARMv8 NEON. > (check_effective_target_vect_call_ceilf): Likewise. > (check_effective_target_vect_call_floorf): Likewise. > (check_effective_target_vect_call_roundf): Likewise. > (check_vect_support_and_set_flags): Handle ARMv8 NEON effective > target.= ------=_NextPart_000_006D_01CE054A.F390E080 Content-Type: text/plain; name=vectorized_vrint_test.txt Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="vectorized_vrint_test.txt" Content-length: 5488 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/targ= et-supports.exp index 0c824b8..3158e87 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2147,22 +2147,6 @@ proc check_effective_target_arm_v8_vfp_ok {} { } } =20 -# Return 1 if this is an ARM target supporting -mfpu=3Dneon-fp-armv8 -# -mfloat-abi=3Dsoftfp -proc check_effective_target_arm_v8_neon_ok {} { - if { [check_effective_target_arm32] } { - return [check_no_compiler_messages arm_v8_neon_ok object { - int foo (void) - { - __asm__ volatile ("vrintn.f32 q0, q0"); - return 0; - } - } "-mfpu=3Dneon-fp-armv8 -mfloat-abi=3Dsoftfp"] - } else { - return 0 - } -} - # Return 1 if this is an ARM target supporting -mfpu=3Dvfp # -mfloat-abi=3Dhard. Some multilibs may be incompatible with these # options. @@ -2226,7 +2210,8 @@ proc add_options_for_arm_v8_neon { flags } { if { ! [check_effective_target_arm_v8_neon_ok] } { return "$flags" } - return "$flags -march=3Darmv8-a -mfpu=3Dneon-fp-armv8 -mfloat-abi=3Dso= ftfp" + global et_arm_v8_neon_flags + return "$flags $et_arm_v8_neon_flags" } =20 # Add the options needed for NEON. We need either -mfloat-abi=3Dsoftfp @@ -2270,6 +2255,38 @@ proc check_effective_target_arm_neon_ok { } { check_effective_target_arm_neon_ok_nocache] } =20 +# Return 1 if this is an ARM target supporting -mfpu=3Dneon-fp-armv8 +# -mfloat-abi=3Dsoftfp or equivalent options. Some multilibs may be +# incompatible with these options. Also set et_arm_v8_neon_flags to the +# best options to add. + +proc check_effective_target_arm_v8_neon_ok_nocache { } { + global et_arm_v8_neon_flags + set et_arm_v8_neon_flags "" + if { [check_effective_target_arm32] } { + foreach flags {"" "-mfloat-abi=3Dsoftfp" "-mfpu=3Dneon-fp-armv8" "-mfpu= =3Dneon-fp-armv8 -mfloat-abi=3Dsoftfp"} { + if { [check_no_compiler_messages_nocache arm_v8_neon_ok object { + #include "arm_neon.h" + void + foo () + { + __asm__ volatile ("vrintn.f32 q0, q0"); + } + } "$flags"] } { + set et_arm_v8_neon_flags $flags + return 1 + } + } + } + + return 0 +} + +proc check_effective_target_arm_v8_neon_ok { } { + return [check_cached_effective_target arm_v8_neon_ok \ + check_effective_target_arm_v8_neon_ok_nocache] +} + # Return 1 if this is an ARM target supporting -mfpu=3Dneon-vfpv4 # -mfloat-abi=3Dsoftfp or equivalent options. Some multilibs may be # incompatible with these options. Also set et_arm_neonv2_flags to the @@ -2509,6 +2526,24 @@ proc check_effective_target_arm_neonv2_hw { } { } [add_options_for_arm_neonv2 ""]] } =20 +# Return 1 if the target supports executing ARMv8 NEON instructions, 0 +# otherwise. + +proc check_effective_target_arm_v8_neon_hw { } { + return [check_runtime arm_v8_neon_hw_available { + #include "arm_neon.h" + int + main (void) + { + float32x2_t a; + asm ("vrinta.f32 %P0, %P1" + : "=3Dw" (a) + : "0" (a)); + return 0; + } + } [add_options_for_arm_v8_neon ""]] +} + # Return 1 if this is a ARM target with NEON enabled. =20 proc check_effective_target_arm_neon { } { @@ -4035,7 +4070,9 @@ proc check_effective_target_vect_call_btruncf { } { verbose "check_effective_target_vect_call_btruncf: using cached result" 2 } else { set et_vect_call_btruncf_saved 0 - if { [istarget aarch64*-*-*] } { + if { [istarget aarch64*-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_v8_neon_ok]) } { set et_vect_call_btruncf_saved 1 } } @@ -4071,7 +4108,9 @@ proc check_effective_target_vect_call_ceilf { } { verbose "check_effective_target_vect_call_ceilf: using cached result" 2 } else { set et_vect_call_ceilf_saved 0 - if { [istarget aarch64*-*-*] } { + if { [istarget aarch64*-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_v8_neon_ok]) } { set et_vect_call_ceilf_saved 1 } } @@ -4107,7 +4146,9 @@ proc check_effective_target_vect_call_floorf { } { verbose "check_effective_target_vect_call_floorf: using cached result" 2 } else { set et_vect_call_floorf_saved 0 - if { [istarget aarch64*-*-*] } { + if { [istarget aarch64*-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_v8_neon_ok]) } { set et_vect_call_floorf_saved 1 } } @@ -4215,7 +4256,9 @@ proc check_effective_target_vect_call_roundf { } { verbose "check_effective_target_vect_call_roundf: using cached result" 2 } else { set et_vect_call_roundf_saved 0 - if { [istarget aarch64*-*-*] } { + if { [istarget aarch64*-*-*] + || ([istarget arm*-*-*] + && [check_effective_target_arm_v8_neon_ok]) } { set et_vect_call_roundf_saved 1 } } @@ -5117,6 +5160,14 @@ proc check_vect_support_and_set_flags { } { } } elseif [istarget ia64-*-*] { set dg-do-what-default run + } elseif [is-effective-target arm_v8_neon_ok] { + eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_v8_neon ""] + lappend DEFAULT_VECTCFLAGS "-ffast-math" + if [is-effective-target arm_v8_neon_hw] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } elseif [is-effective-target arm_neon_ok] { eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""] # NEON does not support denormals, so is not used for vectorizatio= n by ------=_NextPart_000_006D_01CE054A.F390E080--