This patch adds support for (a pair of) bit reversal intrinsics

__builtin_nvptx_brev and __builtin_nvptx_brevll which perform 32-bit

and 64-bit bit reversal (using nvptx's brev instruction) matching

the __brev and __brevll instrinsics provided by NVidia's nvcc compiler.

https://docs.nvidia.com/cuda/cuda-math-api/group__CUDA__MATH__INTRINSIC__INT
.html

 

This patch has been tested on nvptx-none which make and make -k check

with no new failures.  Ok for mainline?

 

 

2023-05-06  Roger Sayle  <roger@nextmovesoftware.com>

 

gcc/ChangeLog

        * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target

        builtin for bit reversal using brev instruction.

        (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and

        NVPTX_BUILTIN_BREVLL.

        (nvptx_init_builtins): Define "brev" and "brevll".

        (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and

        NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.

        * doc/extend.texi (Nvidia PTX Builtin-in Functions): New

        section, document __builtin_nvptx_brev{,ll}.

 

gcc/testsuite/ChangeLog

        * gcc.target/nvptx/brev-1.c: New 32-bit test case.

        * gcc.target/nvptx/brev-2.c: Likewise.

        * gcc.target/nvptx/brevll-1.c: New 64-bit test case.

        * gcc.target/nvptx/brevll-2.c: Likewise.

 

 

Thanks in advance,

Roger

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