From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 203A63857433 for ; Mon, 4 Jul 2022 17:27:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 203A63857433 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:In-Reply-To:References:Cc:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=x2Pc3fw/57/tE43jqEkG/chDuLyOuWfTktLjvj65x8I=; b=kyM7yQmTnZ1OW4KmLw4Ob5h4Eu fZ3cZ+k2miOarfNZIoHKgj1dlN6QesEyXEHoE9QV8h0hjmOdhqrXpFqBcjpZTqUDVPcsGQpH+gDjs POF8Bl031yjHHRJbqAWI2UehAbrM18w5nUw1dyv/ddyr5GOMg+s9nrkj1CeNNyZaWo27KST690J+e Gzn8X2fAWopL5zszyNFii/fDaBCl7YwB7UhFrzzhME7JuG/FPLjxhEdeCGH2YPVCD1s4gQ3SkjQKV jaybD0wvylvi+7my8tZBkkmIKL0HUPiPKGkPmWRkMF6l3PcpbH4hKiUwoypymjn9WEsqEUlUn2TwU xUR2EJbw==; Received: from [185.62.158.67] (port=64179 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o8Pr8-0006IJ-5e; Mon, 04 Jul 2022 13:27:30 -0400 From: "Roger Sayle" To: "'Uros Bizjak'" Cc: References: <025701d88954$f281ca40$d7855ec0$@nextmovesoftware.com> In-Reply-To: Subject: RE: [x86 PATCH] PR rtl-optimization/96692: ((A|B)^C)^A using andn with -mbmi. Date: Mon, 4 Jul 2022 18:27:29 +0100 Message-ID: <007501d88fcb$56f15820$04d40860$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0076_01D88FD3.B8B80A10" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQGASBktOtpOjPWEDsvMeACnUVyhjwG4CmbrrhFECsA= Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Jul 2022 17:27:32 -0000 This is a multipart message in MIME format. ------=_NextPart_000_0076_01D88FD3.B8B80A10 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hi Uros, Thanks for the review. This patch implements all of your suggestions, = both removing ix86_pre_reload_split from the combine splitter(s), and = dividing the original splitter up into four simpler variants, that use match_dup = to=20 handle the variants/permutations caused by operator commutativity. This revised patch has been tested on x86_64-pc-linux-gnu with make = bootstrap and make -k check, both with and without --target_board=3Dunix{-m32} = with no new failures. Ok for mainline? 2022-07-04 Roger Sayle Uro=C5=A1 Bizjak gcc/ChangeLog PR rtl-optimization/96692 * config/i386/i386.md (define_split): Split ((A | B) ^ C) ^ D as (X & ~Y) ^ Z on target BMI when either C or D is A or B. gcc/testsuite/ChangeLog PR rtl-optimization/96692 * gcc.target/i386/bmi-andn-4.c: New test case. Thanks again, Roger -- > -----Original Message----- > From: Uros Bizjak > Sent: 26 June 2022 18:08 > To: Roger Sayle > Cc: gcc-patches@gcc.gnu.org > Subject: Re: [x86 PATCH] PR rtl-optimization/96692: ((A|B)^C)^A using = andn with > -mbmi. >=20 > On Sun, Jun 26, 2022 at 2:04 PM Roger Sayle = > wrote: > > > > > > This patch addresses PR rtl-optimization/96692 on x86_64, by = providing > > a define_split for combine to convert the three operation = ((A|B)^C)^D > > into a two operation sequence using andn when either A or B is the > > same register as C or D. This is essentially a reassociation = problem > > that's only a win if the target supports an and-not instruction (as = with -mbmi). > > > > Hence for the new test case: > > > > int f(int a, int b, int c) > > { > > return (a ^ b) ^ (a | c); > > } > > > > GCC on x86_64-pc-linux-gnu wth -O2 -mbmi would previously generate: > > > > xorl %edi, %esi > > orl %edx, %edi > > movl %esi, %eax > > xorl %edi, %eax > > ret > > > > but with this patch now generates: > > > > andn %edx, %edi, %eax > > xorl %esi, %eax > > ret > > > > I'll investigate whether this optimization can also be implemented > > more generically in simplify_rtx when the backend provides accurate > > rtx_costs for "(and (not ..." (as there's no optab for andn). > > > > This patch has been tested on x86_64-pc-linux-gnu with make = bootstrap > > and make -k check, both with and without = --target_board=3Dunix{-m32}, > > with no new failures. Ok for mainline? > > > > > > 2022-06-26 Roger Sayle > > > > gcc/ChangeLog > > PR rtl-optimization/96692 > > * config/i386/i386.md (define_split): Split ((A | B) ^ C) ^ = D > > as (X & ~Y) ^ Z on target BMI when either C or D is A or B. > > > > gcc/testsuite/ChangeLog > > PR rtl-optimization/96692 > > * gcc.target/i386/bmi-andn-4.c: New test case. >=20 > + "TARGET_BMI > + && ix86_pre_reload_split () > + && (rtx_equal_p (operands[1], operands[3]) > + || rtx_equal_p (operands[1], operands[4]) > + || (REG_P (operands[2]) > + && (rtx_equal_p (operands[2], operands[3]) > + || rtx_equal_p (operands[2], operands[4]))))" >=20 > You don't need a ix86_pre_reload_split for combine splitter* >=20 > OTOH, please split the pattern to two for each commutative operand and = use > (match_dup x) instead. Something similar to [1]. >=20 > *combine splitter is described in the documentation as the splitter = pattern that > does *not* match any existing insn pattern. >=20 > [1] https://gcc.gnu.org/pipermail/gcc-patches/2022-June/596804.html >=20 > Uros. ------=_NextPart_000_0076_01D88FD3.B8B80A10 Content-Type: text/plain; name="patchbm3.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchbm3.txt" diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md=0A= index 20c3b9a..d114754 100644=0A= --- a/gcc/config/i386/i386.md=0A= +++ b/gcc/config/i386/i386.md=0A= @@ -10522,6 +10522,82 @@=0A= (set (match_dup 0) (match_op_dup 1=0A= [(and:SI (match_dup 3) (match_dup 2))=0A= (const_int 0)]))])=0A= +=0A= +;; Variant 1 of 4: Split ((A | B) ^ A) ^ C as (B & ~A) ^ C.=0A= +(define_split=0A= + [(set (match_operand:SWI48 0 "register_operand")=0A= + (xor:SWI48=0A= + (xor:SWI48=0A= + (ior:SWI48 (match_operand:SWI48 1 "register_operand")=0A= + (match_operand:SWI48 2 "nonimmediate_operand"))=0A= + (match_dup 1))=0A= + (match_operand:SWI48 3 "nonimmediate_operand")))=0A= + (clobber (reg:CC FLAGS_REG))]=0A= + "TARGET_BMI"=0A= + [(parallel=0A= + [(set (match_dup 4) (and:SWI48 (not:SWI48 (match_dup 1)) = (match_dup 2)))=0A= + (clobber (reg:CC FLAGS_REG))])=0A= + (parallel=0A= + [(set (match_dup 0) (xor:SWI48 (match_dup 4) (match_dup 3)))=0A= + (clobber (reg:CC FLAGS_REG))])]=0A= + "operands[4] =3D gen_reg_rtx (mode);")=0A= +=0A= +;; Variant 2 of 4: Split ((A | B) ^ B) ^ C as (A & ~B) ^ C.=0A= +(define_split=0A= + [(set (match_operand:SWI48 0 "register_operand")=0A= + (xor:SWI48=0A= + (xor:SWI48=0A= + (ior:SWI48 (match_operand:SWI48 1 "register_operand")=0A= + (match_operand:SWI48 2 "register_operand"))=0A= + (match_dup 2))=0A= + (match_operand:SWI48 3 "nonimmediate_operand")))=0A= + (clobber (reg:CC FLAGS_REG))]=0A= + "TARGET_BMI"=0A= + [(parallel=0A= + [(set (match_dup 4) (and:SWI48 (not:SWI48 (match_dup 2)) = (match_dup 1)))=0A= + (clobber (reg:CC FLAGS_REG))])=0A= + (parallel=0A= + [(set (match_dup 0) (xor:SWI48 (match_dup 4) (match_dup 3)))=0A= + (clobber (reg:CC FLAGS_REG))])]=0A= + "operands[4] =3D gen_reg_rtx (mode);")=0A= +=0A= +;; Variant 3 of 4: Split ((A | B) ^ C) ^ A as (B & ~A) ^ C.=0A= +(define_split=0A= + [(set (match_operand:SWI48 0 "register_operand")=0A= + (xor:SWI48=0A= + (xor:SWI48=0A= + (ior:SWI48 (match_operand:SWI48 1 "register_operand")=0A= + (match_operand:SWI48 2 "nonimmediate_operand"))=0A= + (match_operand:SWI48 3 "nonimmediate_operand"))=0A= + (match_dup 1)))=0A= + (clobber (reg:CC FLAGS_REG))]=0A= + "TARGET_BMI"=0A= + [(parallel=0A= + [(set (match_dup 4) (and:SWI48 (not:SWI48 (match_dup 1)) = (match_dup 2)))=0A= + (clobber (reg:CC FLAGS_REG))])=0A= + (parallel=0A= + [(set (match_dup 0) (xor:SWI48 (match_dup 4) (match_dup 3)))=0A= + (clobber (reg:CC FLAGS_REG))])]=0A= + "operands[4] =3D gen_reg_rtx (mode);")=0A= +=0A= +;; Variant 4 of 4: Split ((A | B) ^ C) ^ B as (A & ~B) ^ C.=0A= +(define_split=0A= + [(set (match_operand:SWI48 0 "register_operand")=0A= + (xor:SWI48=0A= + (xor:SWI48=0A= + (ior:SWI48 (match_operand:SWI48 1 "register_operand")=0A= + (match_operand:SWI48 2 "register_operand"))=0A= + (match_operand:SWI48 3 "nonimmediate_operand"))=0A= + (match_dup 2)))=0A= + (clobber (reg:CC FLAGS_REG))]=0A= + "TARGET_BMI"=0A= + [(parallel=0A= + [(set (match_dup 4) (and:SWI48 (not:SWI48 (match_dup 2)) = (match_dup 1)))=0A= + (clobber (reg:CC FLAGS_REG))])=0A= + (parallel=0A= + [(set (match_dup 0) (xor:SWI48 (match_dup 4) (match_dup 3)))=0A= + (clobber (reg:CC FLAGS_REG))])]=0A= + "operands[4] =3D gen_reg_rtx (mode);")=0A= =0C=0A= ;; Logical inclusive and exclusive OR instructions=0A= =0A= diff --git a/gcc/testsuite/gcc.target/i386/bmi-andn-4.c = b/gcc/testsuite/gcc.target/i386/bmi-andn-4.c=0A= new file mode 100644=0A= index 0000000..fb89529=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/i386/bmi-andn-4.c=0A= @@ -0,0 +1,9 @@=0A= +/* { dg-do compile } */=0A= +/* { dg-options "-O2 -mbmi" } */=0A= +=0A= +int f(int a, int b, int c)=0A= +{=0A= + return (a ^ b) ^ (a | c);=0A= +}=0A= +=0A= +/* { dg-final { scan-assembler "andn\[ \\t\]+" } } */=0A= ------=_NextPart_000_0076_01D88FD3.B8B80A10--