From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id D19083858D28 for ; Sun, 18 Jun 2023 10:22:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D19083858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:To:From:Sender:Reply-To:Cc:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=7DBrjqakudpRag+e3p5AYWvCl6858tx1lf6xzKqcp/c=; b=nUlPOHiD8G9SWWyvyseB1yIomp 8bZbSt9BR7v4MwbwuAWqnaZ0iRwrSxoyvuElA7ESj2odnEQH0GDKecHX/ZcWH7nBw6P70U7Aj4DTu oglys3uHfaowHRK6nOOem7nOItCYls5vWSb7gTAxm/FE5yR5IWymaJ3d7xdxHapiDqsm5YTXNUhzT sO9VGAQ168slrEPtmlX3q3KeUxWBlGwEI68g71DSx0oZJnQ2N67v6tt8e660nJtPgp3YyxFpcoMsG adnmSgQT+fY/SPxIQp/mh28ZynKr5lhJ/JWngXiFmV4symJkfFinPOyPvGwMk7TFvy1qe+ZTqh+p1 x0hI/FMw==; Received: from host86-169-41-81.range86-169.btcentralplus.com ([86.169.41.81]:56710 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1qApYW-00012h-0W for gcc-patches@gcc.gnu.org; Sun, 18 Jun 2023 06:22:48 -0400 From: "Roger Sayle" To: Subject: [PATCH] Improved SUBREG simplifications in simplify-rtx.cc's simplify_subreg. Date: Sun, 18 Jun 2023 11:22:46 +0100 Message-ID: <008401d9a1ce$d46257d0$7d270770$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_0085_01D9A1D7.3626BFD0" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdmhzmpiPXUz2JTIQhmrdMJ8OTaDgQ== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_BARRACUDACENTRAL,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This is a multipart message in MIME format. ------=_NextPart_000_0085_01D9A1D7.3626BFD0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit An x86 backend improvement that I'm working results in combine attempting to recognize: (set (reg:DI 87 [ xD.2846 ]) (ior:DI (subreg:DI (ashift:TI (zero_extend:TI (reg:DI 92)) (const_int 64 [0x40])) 0) (reg:DI 91))) where the lowpart SUBREG has difficulty seeing through the (hi<<64) that the lowpart must be zero. Rather than workaround this in the backend, the better fix is to teach simplify-rtx that lowpart((hi<<64)|lo) -> lo and highpart((hi<<64)|lo) -> hi, so that all backends benefit. Reducing the number of places where the middle-end generates a SUBREG of something other than REG is a good thing. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures, except for pr78904-1b.c, for which a backend solution has just been proposed. Ok for mainline? 2023-06-18 Roger Sayle gcc/ChangeLog * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs of ASHIFT to const0_rtx with sufficiently large shift count. Optimize highpart SUBREGs of ASHIFT as the shift operand when the shift count is the correct offset. Optimize SUBREGs of multi-word logic operations if the SUBREGs of both operands can be simplified. Thanks in advance, Roger -- ------=_NextPart_000_0085_01D9A1D7.3626BFD0 Content-Type: text/plain; name="patchzt3.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchzt3.txt" diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc=0A= index 21b7eb4..6715247 100644=0A= --- a/gcc/simplify-rtx.cc=0A= +++ b/gcc/simplify-rtx.cc=0A= @@ -7746,6 +7746,38 @@ simplify_context::simplify_subreg (machine_mode = outermode, rtx op,=0A= return CONST0_RTX (outermode);=0A= }=0A= =0A= + /* Optimize SUBREGS of scalar integral ASHIFT by a valid constant. */=0A= + if (GET_CODE (op) =3D=3D ASHIFT=0A= + && SCALAR_INT_MODE_P (innermode)=0A= + && CONST_INT_P (XEXP (op, 1))=0A= + && INTVAL (XEXP (op, 1)) > 0=0A= + && known_gt (GET_MODE_BITSIZE (innermode), INTVAL (XEXP (op, 1))))=0A= + {=0A= + HOST_WIDE_INT val =3D INTVAL (XEXP (op, 1));=0A= + /* A lowpart SUBREG of a ASHIFT by a constant may fold to zero. = */=0A= + if (known_eq (subreg_lowpart_offset (outermode, innermode), byte)=0A= + && known_le (GET_MODE_BITSIZE (outermode), val))=0A= + return CONST0_RTX (outermode);=0A= + /* Optimize the highpart SUBREG of a suitable ASHIFT = (ZERO_EXTEND). */=0A= + if (GET_CODE (XEXP (op, 0)) =3D=3D ZERO_EXTEND=0A= + && GET_MODE (XEXP (XEXP (op, 0), 0)) =3D=3D outermode=0A= + && known_eq (GET_MODE_BITSIZE (outermode), val)=0A= + && known_eq (GET_MODE_BITSIZE (innermode), 2 * val)=0A= + && known_eq (subreg_highpart_offset (outermode, innermode), byte))=0A= + return XEXP (XEXP (op, 0), 0);=0A= + }=0A= +=0A= + /* Attempt to simplify WORD_MODE SUBREGs of bitwise expressions. */=0A= + if (outermode =3D=3D word_mode=0A= + && (GET_CODE (op) =3D=3D IOR || GET_CODE (op) =3D=3D XOR || = GET_CODE (op) =3D=3D AND)=0A= + && SCALAR_INT_MODE_P (innermode))=0A= + {=0A= + rtx op0 =3D simplify_subreg (outermode, XEXP (op, 0), innermode, = byte);=0A= + rtx op1 =3D simplify_subreg (outermode, XEXP (op, 1), innermode, = byte);=0A= + if (op0 && op1)=0A= + return simplify_gen_binary (GET_CODE (op), outermode, op0, op1);=0A= + }=0A= +=0A= scalar_int_mode int_outermode, int_innermode;=0A= if (is_a (outermode, &int_outermode)=0A= && is_a (innermode, &int_innermode)=0A= ------=_NextPart_000_0085_01D9A1D7.3626BFD0--