From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 7BDDA385737F for ; Thu, 28 Jul 2022 16:43:30 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7BDDA385737F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=omk9y+hTktOs0CniabhWo5s1b3hSh07TMdr3l+Xah30=; b=M5+Kn/8rAX7Pgbida2hZrua5t3 nQFKhUqhZ6VV8q5yHHedy7IevA6V3Gn/omSk4Pz7zDqXHB89NeCPRIrZA4fu6ZpjOnPHv9Ygzs8E2 q7Le9ZgJ6i74sG4xBi65SG0PGR/Xq1V4aamMOZHo0hjD/ziArYGaInBLc0mF+9JCGN72uM3gCTHi1 KYrjAhwzSsUNune23ZmP0KfgO1EH8dZ6yV7g5ldFYoep1/EQThTC87+SWwFEHZKda0gqxJl0Ir+rL e0aJtHgKoqwyH0cTD/ntLrbgCyeoA1PUZHKzgNwgDUT20p0HHRJVVVG/zC9DpMbA+o3ZKDu4WSh8U QGMoN+uQ==; Received: from host86-169-41-119.range86-169.btcentralplus.com ([86.169.41.119]:55188 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oH6bh-0007bF-Ix; Thu, 28 Jul 2022 12:43:29 -0400 From: "Roger Sayle" To: Subject: [x86_64 PATCH] PR target/106450: Tweak timode_remove_non_convertible_regs. Date: Thu, 28 Jul 2022 17:43:26 +0100 Message-ID: <008b01d8a2a1$2ab6ff60$8024fe20$@nextmovesoftware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_008C_01D8A2A9.8C7DB150" X-Mailer: Microsoft Outlook 16.0 Thread-Index: Adiin/eOCXgEwfivR+mlf0JL1+biJA== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 28 Jul 2022 16:43:32 -0000 This is a multipart message in MIME format. ------=_NextPart_000_008C_01D8A2A9.8C7DB150 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit This patch resolves PR target/106450, some more fall-out from more aggressive TImode scalar-to-vector (STV) optimizations. I continue to be caught out by how far TImode STV has diverged from DImode/SImode STV, and therefore requires additional (unexpected) tweaking. Many thanks to H.J. Lu for pointing out timode_remove_non_convertible_regs needs to be extended to handle XOR (and other new operations). Unhelpfully the comment above this function states that it's the TImode version of "remove_non_convertible_regs", which doesn't exist anymore, so I've resurrected an explanatory comment from the git history. By refactoring the checks for hard regs and already "marked" regs into timode_check_non_convertible_regs itself, all its callers are simplified. This patch then uses GET_RTX_CLASS to generically handle unary and binary operations, calling timode_check_non_convertible_regs on each TImode register operand in the single_set's SET_SRC. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-07-28 Roger Sayle gcc/ChangeLog PR target/106450 * config/i386/i386-features.cc (timode_check_non_convertible_regs): Do nothing if REGNO is set in the REGS bitmap, or is a hard reg. (timode_remove_non_convertible_regs): Update comment. Call timode_check_non_convertible_regs on all register operands of supported (binary and unary) operations. gcc/testsuite/ChangeLog PR target/106450 * gcc.target/i386/pr106450.c: New test case. Thanks in advance, Roger -- ------=_NextPart_000_008C_01D8A2A9.8C7DB150 Content-Type: text/plain; name="patchst.txt" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="patchst.txt" diff --git a/gcc/config/i386/i386-features.cc = b/gcc/config/i386/i386-features.cc=0A= index aa5de71..2a4097c 100644=0A= --- a/gcc/config/i386/i386-features.cc=0A= +++ b/gcc/config/i386/i386-features.cc=0A= @@ -1808,6 +1808,11 @@ static void=0A= timode_check_non_convertible_regs (bitmap candidates, bitmap regs,=0A= unsigned int regno)=0A= {=0A= + /* Do nothing if REGNO is already in REGS or is a hard reg. */=0A= + if (bitmap_bit_p (regs, regno)=0A= + || HARD_REGISTER_NUM_P (regno))=0A= + return;=0A= +=0A= for (df_ref def =3D DF_REG_DEF_CHAIN (regno);=0A= def;=0A= def =3D DF_REF_NEXT_REG (def))=0A= @@ -1843,7 +1848,13 @@ timode_check_non_convertible_regs (bitmap = candidates, bitmap regs,=0A= }=0A= }=0A= =0A= -/* The TImode version of remove_non_convertible_regs. */=0A= +/* For a given bitmap of insn UIDs scans all instructions and=0A= + remove insn from CANDIDATES in case it has both convertible=0A= + and not convertible definitions.=0A= +=0A= + All insns in a bitmap are conversion candidates according to=0A= + scalar_to_vector_candidate_p. Currently it implies all insns=0A= + are single_set. */=0A= =0A= static void=0A= timode_remove_non_convertible_regs (bitmap candidates)=0A= @@ -1861,21 +1872,40 @@ timode_remove_non_convertible_regs (bitmap = candidates)=0A= rtx dest =3D SET_DEST (def_set);=0A= rtx src =3D SET_SRC (def_set);=0A= =0A= - if ((!REG_P (dest)=0A= - || bitmap_bit_p (regs, REGNO (dest))=0A= - || HARD_REGISTER_P (dest))=0A= - && (!REG_P (src)=0A= - || bitmap_bit_p (regs, REGNO (src))=0A= - || HARD_REGISTER_P (src)))=0A= - continue;=0A= -=0A= if (REG_P (dest))=0A= timode_check_non_convertible_regs (candidates, regs,=0A= REGNO (dest));=0A= =0A= - if (REG_P (src))=0A= - timode_check_non_convertible_regs (candidates, regs,=0A= - REGNO (src));=0A= + switch (GET_RTX_CLASS (GET_CODE (src)))=0A= + {=0A= + case RTX_OBJ:=0A= + if (REG_P (src))=0A= + timode_check_non_convertible_regs (candidates, regs,=0A= + REGNO (src));=0A= + break;=0A= +=0A= + case RTX_UNARY:=0A= + if (REG_P (XEXP (src, 0))=0A= + && GET_MODE (XEXP (src, 0)) =3D=3D TImode)=0A= + timode_check_non_convertible_regs (candidates, regs,=0A= + REGNO (XEXP (src, 0)));=0A= + break;=0A= +=0A= + case RTX_COMM_ARITH:=0A= + case RTX_BIN_ARITH:=0A= + if (REG_P (XEXP (src, 0))=0A= + && GET_MODE (XEXP (src, 0)) =3D=3D TImode)=0A= + timode_check_non_convertible_regs (candidates, regs,=0A= + REGNO (XEXP (src, 0)));=0A= + if (REG_P (XEXP (src, 1))=0A= + && GET_MODE (XEXP (src, 1)) =3D=3D TImode)=0A= + timode_check_non_convertible_regs (candidates, regs,=0A= + REGNO (XEXP (src, 1)));=0A= + break;=0A= +=0A= + default:=0A= + break;=0A= + }=0A= }=0A= =0A= EXECUTE_IF_SET_IN_BITMAP (regs, 0, id, bi)=0A= diff --git a/gcc/testsuite/gcc.target/i386/pr106450.c = b/gcc/testsuite/gcc.target/i386/pr106450.c=0A= new file mode 100644=0A= index 0000000..d16231f=0A= --- /dev/null=0A= +++ b/gcc/testsuite/gcc.target/i386/pr106450.c=0A= @@ -0,0 +1,14 @@=0A= +/* { dg-do compile { target int128 } } */=0A= +/* { dg-options "-O2 -fsplit-paths" } */=0A= +=0A= +__int128 n;=0A= +=0A= +__attribute__ ((simd)) void=0A= +foo (void)=0A= +{=0A= + __int128 uninitialized;=0A= + unsigned __int128 *p =3D &n;=0A= +=0A= + n >>=3D *p ? : 2;=0A= + n |=3D uninitialized;=0A= +}=0A= ------=_NextPart_000_008C_01D8A2A9.8C7DB150--