Hi Uros, As you've requested/suggested, here's a patch that tidies up and unifies doubleword handling in i386.md; converting all doubleword splitters for logic operations to post-reload form, generalizing their define_insn_and_split templates to form (supporting TARGET_64BIT ? TImode : DImode), and where required tweaking the corresponding expanders to use SDWIM to support TImode doubleword operations. These changes incorporate your feedback from https://gcc.gnu.org/pipermail/gcc-patches/2022-June/596205.html where I included many/several of these clean-ups, in a patch to add a new optimization. I agree, it's better to split these out (this patch), and I'll resubmit the (smaller) optimization patch as a follow-up. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32}, with no new failures. Ok for mainline? 2022-06-28 Roger Sayle gcc/ChangeLog * config/i386/i386.md (general_szext_operand): Add TImode support using x86_64_hilo_general_operand predicate. (*cmp_doubleword): Use x86_64_hilo_general_operand predicate. (*add3_doubleword): Improved optimization of zero addition. (and3): Use SDWIM mode iterator to add support for double word bit-wise AND in TImode. Use force_reg when double word immediate operand isn't x86_64_hilo_general_operand. (and3_doubleword): Generalized from anddi3_doubleword and converted into a post-reload splitter. (*andn3_doubleword): Generalized from *andndi3_doubleword. (define_split): Generalize DImode splitters for andn to . One splitter for TARGET_BMI, the other for !TARGET_BMI. (3): Use SDWIM mode iterator to add suppport for double word bit-wise XOR and bit-wise IOR in TImode. Use force_reg when double word immediate operand isn't x86_64_hilo_general_operand. (*di3_doubleword): Generalized from di3_doubleword. (one_cmpl2): Use SDWIM mode iterator to add support for double word bit-wise NOT in TImode. (one_cmpl2_doubleword): Generalize from one_cmpldi2_doubleword and converted into a post-reload splitter. Thanks again, Roger --