From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 5B08A3857C47 for ; Tue, 4 Aug 2020 03:28:20 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 5B08A3857C47 Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 07432j3O079216; Mon, 3 Aug 2020 23:28:17 -0400 Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 32pt8e6tna-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 03 Aug 2020 23:28:17 -0400 Received: from m0098417.ppops.net (m0098417.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id 0743FRQO108912; Mon, 3 Aug 2020 23:28:17 -0400 Received: from ppma06ams.nl.ibm.com (66.31.33a9.ip4.static.sl-reverse.com [169.51.49.102]) by mx0a-001b2d01.pphosted.com with ESMTP id 32pt8e6tmx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 03 Aug 2020 23:28:17 -0400 Received: from pps.filterd (ppma06ams.nl.ibm.com [127.0.0.1]) by ppma06ams.nl.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 0743H3jl029307; Tue, 4 Aug 2020 03:28:15 GMT Received: from b06avi18626390.portsmouth.uk.ibm.com (b06avi18626390.portsmouth.uk.ibm.com [9.149.26.192]) by ppma06ams.nl.ibm.com with ESMTP id 32mynh2v7f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 04 Aug 2020 03:28:15 +0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 0743QkMg63570318 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 4 Aug 2020 03:26:47 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2D09011C054; Tue, 4 Aug 2020 03:28:13 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1B1C311C04C; Tue, 4 Aug 2020 03:28:11 +0000 (GMT) Received: from 192.168.1.101 (unknown [9.200.32.41]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 4 Aug 2020 03:28:10 +0000 (GMT) Subject: Re: [PATCH v5] dse: Remove partial load after full store for high part access[PR71309] To: gcc-patches@gcc.gnu.org, segher@kernel.crashing.org, wschmidt@linux.ibm.com, dberlin@dberlin.org, jakub@redhat.com, richard.sandiford@arm.com References: <20200721105427.15217-1-luoxhu@linux.ibm.com> <268ccb96-217f-32df-fa45-891762914ea3@linux.ibm.com> <78e2c325-9068-6906-9e54-207049c3b121@linux.ibm.com> <1f966acd-605a-ef60-4084-8a3bd03fd90e@linux.ibm.com> From: luoxhu Message-ID: <00dd9d81-4f44-1241-3ad8-8fa3c2915d12@linux.ibm.com> Date: Tue, 4 Aug 2020 11:28:09 +0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-08-03_15:2020-08-03, 2020-08-03 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 bulkscore=0 suspectscore=0 malwarescore=0 phishscore=0 mlxlogscore=904 spamscore=0 mlxscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2008040022 X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, NICE_REPLY_A, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Aug 2020 03:28:21 -0000 On 2020/8/3 22:01, Richard Sandiford wrote: >> /* Try a wider mode if truncating the store mode to NEW_MODE >> requires a real instruction. */ >> if (maybe_lt (GET_MODE_SIZE (new_mode), GET_MODE_SIZE (store_mode)) >> @@ -1779,6 +1780,25 @@ find_shift_sequence (poly_int64 access_size, >> && !targetm.modes_tieable_p (new_mode, store_mode)) >> continue; >> >> + if (multiple_p (GET_MODE_BITSIZE (new_mode), shift) > > Like I mentioned before, this should be the other way around: > > multiple_p (shift, GET_MODE_BITSIZE (new_mode)) > > i.e. for the subreg to be valid, the shift amount must be a multiple > of the outer mode size in bits. > > OK with that change, thanks, and sorry for the multiple review cycles. Appreciate your time and patience to make it better :). Updated the change and lp64 requirements from Segher and committed by r11-2526-g265d817b1eb4644c7a9613ad6920315d98e2e0a4, thank you all. Xionghu > > Richard >